Complete, 12-Bit, 45 MHz
CCD Signal Processor
Data Sheet
ADDI7100
Rev. D Document Feedback
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FEATURES
Pin-compatible upgrade for the AD9945
45 MHz correlated double sampler (CDS) with variable gain
6 dB to 42 dB, 10-bit variable gain amplifier (VGA)
Low noise optical black clamp circuit
Preblanking function
12-bit, 45 MHz ADC
No missing codes guaranteed
3-wire serial digital interface
3 V single-supply operation
Space-saving, 32-lead, 5 mm × 5 mm LFCSP
APPLICATIONS
Digital still cameras
Digital video camcorders
PC cameras
Portable CCD imaging devices
CCTV cameras
GENERAL DESCRIPTION
The ADDI7100 is a complete analog signal processor for charge-
coupled device (CCD) applications. It features a 45 MHz,
single-channel architecture designed to sample and condition
the outputs of interlaced and progressive scan area CCD arrays.
The signal chain for the ADDI7100 consists of a correlated double
sampler (CDS), a digitally controlled variable gain amplifier
(VGA), a black level clamp, and a 12-bit ADC.
The internal registers are programmed through a 3-wire serial
digital interface. Programmable features include gain adjustment,
black level adjustment, input clock polarity, and power-down
modes. The ADDI7100 operates from a single 3 V power supply,
typically dissipates 125 mW, and is packaged in a space-saving,
32-lead LFCSP.
FUNCTIONAL BLOCK DIAGRAM
DATACLKSHDSHP
BAND GAP
REFERENCE
DOUT
D0 TO D11
CCDIN
PBLK
REFT
REFB
INTERNAL
TIMING
6dB TO 42dB
−3dB, 0dB,
+3dB, +6dB
AVDD
DVDD
DVSS
AVSS
DRVDD
DRVSS
10
DIGITAL
INTERFACE
SDATASCKSL
CLPOB
12
CDS
VGA
CLP
ADDI7100
CONTROL
REGISTERS
12-BIT
ADC
VD
07608-001
Figure 1.
ADDI7100* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
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DOCUMENTATION
Data Sheet
ADDI7100: Complete, 12-Bit, 45 MHz CCD Signal
Processor Data Sheet
DESIGN RESOURCES
ADDI7100 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
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ADDI7100 Data Sheet
Rev. D | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
General Specifications ................................................................. 3
Digital Specifications ................................................................... 3
System Specifications ................................................................... 4
Timing Specifications .................................................................. 5
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ............................................. 9
Equivalent Input Circuits .............................................................. 10
Terminology .................................................................................... 11
Circuit Description and Operation .............................................. 12
DC Restore .................................................................................. 12
Correlated Double Sampler (CDS) .......................................... 12
Optical Black Clamp .................................................................. 12
Analog-to-Digital Converter (ADC) ....................................... 13
Variable Gain Amplifier (VGA) ............................................... 13
Digital Data Outputs .................................................................. 13
Applications Information .............................................................. 14
Initial Power-On Sequence ....................................................... 15
Grounding and Decoupling Recommendations .................... 15
Serial Interface Timing .................................................................. 16
Complete Register Listing ............................................................. 17
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 19
REVISION HISTORY
1/2017Rev. C to Rev. D
Changes to Figure 5 and Table 7 ..................................................... 8
Changes to Figure 15 ...................................................................... 14
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 19
6/2010—Rev. B to Rev. C
Changes to 0x0D Description and 0xFF Description in
Table 8 .............................................................................................. 18
9/2009Rev. A. to Rev. B
Changes to Features Section............................................................ 1
Changed Power-Down Mode to Full Standby Mode, Table 1 .... 3
Moved Timing Diagrams Section .................................................. 5
Changes to Table 4, Figure 3, and Figure 4 .................................... 5
Changes to Figure 9 Caption......................................................... 10
Changes to Optical Black Clamp Section .................................... 12
Changes to Initial Power-On Sequence Section ......................... 15
Changes to Figure 16 ...................................................................... 16
Changes to Table 8 .......................................................................... 17
2/2009Rev. 0 to Rev. A
Changes to Serial Interface Timing Section................................ 16
Changes to Figure 16 and Figure 17 ............................................ 16
10/2008Revision 0: Initial Version

ADDI7100BCPZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE 12-Bit 45 MHz CCD Signal Processor
Lifecycle:
New from this manufacturer.
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