1-Mbit (64K x 16) Static RAM
CY7C1021BN
CY7C10211BN
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-06494 Rev. *A Revised September 28, 2006
Features
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
•High speed
—t
AA
= 10 ns (Commercial)
—t
AA
= 15 ns (Automotive)
• CMOS for optimum speed/power
• Low active power
— 825 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in Pb free and non Pb free 44-pin TSOP II and
44-pin 400-mil-wide SOJ
Functional Description
[1]
The CY7C1021BN/CY7C10211BN is a high-performance
CMOS static RAM organized as 65,536 words by 16 bits. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE
) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE
) is LOW, then data from I/O pins (I/O
1
through I/O
8
), is
written into the location specified on the address pins (A
0
through A
15
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
9
through I/O
16
) is written into the location
specified on the address pins (A
0
through A
15
).
Reading from the device is accomplished by taking Chip
Enable (CE
) and Output Enable (OE) LOW while forcing the
Write Enable (WE
) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
1
to I/O
8
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
9
to I/O
16
. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O
1
through I/O
16
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1021BN/CY7C10211BN is available in standard
44-pin TSOP Type II and 44-pin 400-mil-wide SOJ packages.
Customers should use part number CY7C10211BN when
ordering parts with 10 ns t
AA
, and CY7C1021BN when
ordering 12 ns and 15 ns t
AA
.
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com
Logic Block Diagram
64K x 16
RAM Array
I/O
1
–I/O
8
ROW DECODER
A
7
A
6
A
5
A
4
A
3
A
0
COLUMN DECODER
A
9
A
10
A
11
A
12
A
13
A
14
A
15
512 X 2048
SENSE AMPS
DATA IN
OE
A
2
A
1
I/O
9
–I/O
16
CE
WE
BLE
BHE
A
8
DRIVERS
WE
1
2
3
4
5
6
7
8
9
10
11
14
31
32
36
35
34
33
37
40
39
38
Top View
SOJ / TSOP II
12
13
41
44
43
42
16
15
29
30
V
CC
A
15
A
14
A
13
A
12
NC
A
4
A
3
OE
V
SS
A
5
I/O
16
A
2
CE
I/O
3
I/O
1
I/O
2
BHE
NC
A
1
A
0
18
17
20
19
I/O
4
27
28
25
26
22
21
23
24
NC
V
SS
I/O
7
I/O
5
I/O
6
I/O
8
A
6
A
7
BLE
V
CC
I/O
15
I/O
14
I/O
13
I/O
12
I/O
11
I/O
10
I/O
9
A
8
A
9
A
10
A
11
Pin Configurations
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