LTC6605-7
13
66057f
APPLICATIONS INFORMATION
66057 F05a
+
22
18
+
16
12
2
4
1
5
8
10
7
11
±0.4dB 6.7MHz PASSBAND
GAIN = 1V/V (0dB)
Z
IN
= 800Ω
80.6Ω
80.6Ω
66057 F05b
+
22
18
+
16
12
2
4
1
5
8
10
7
11
±0.4dB 6.7MHz PASSBAND
GAIN = 2.85V/V (9.1dB)
Z
IN
= 280Ω
40.2Ω
40.2Ω
40.2Ω
40.2Ω
66057 F05c
±0.4dB 6.7MHz PASSBAND
GAIN = 3.85V/V (11.7dB)
Z
IN
= 208Ω
+
22
18
+
16
12
2
4
1
5
8
10
7
11
40.2Ω
40.2Ω
40.2Ω
40.2Ω
Figure 5. Flat Passband 6.7MHz Filter Confi gurations with Some External Resistors
Gain Response Gain Response Gain Response
Phase and Group Delay Response Small Signal Step Response
FREQUENCY (MHz)
1010.1
–50
0
–10
–20
–30
–40
GAIN MAGNITUDE (dB)
10
20
100 1000
66057 F05d
FREQUENCY (MHz)
1010.1
–50
0
–10
–20
–30
–40
GAIN MAGNITUDE (dB)
10
20
100 1000
66057 F05e
FREQUENCY (MHz)
1010.1
–50
0
–10
–20
–30
–40
GAIN MAGNITUDE (dB)
10
20
100 1000
66057 F05f
FREQUENCY (MHz)
1010.1
–50
–100
–150
–200
–250 0
5
10
15
20
25
30
35
PHASE (DEG)
GROUP DELAY (ns)
0
100 1000
66057 F05g
PHASE
GROUP DELAY
100mV/DIV
66057 G05h
20ns/DIV
GAIN = 1V/ V
LTC6605-7
14
66057f
Input Impedance
Calculating the low frequency input impedance depends
on how the inputs are driven.
Figure 6 shows a simplifi ed low frequency equivalent cir-
cuit. For balanced input sources (V
INP
= –V
INM
), the low
frequency input impedance is given by the equation:
R
INP
= R
INM
= R1
Therefore, the differential input impedance is simply:
R
IN(DIFF)
= 2 • R1
APPLICATIONS INFORMATION
+
R2
V
OUT
V
OUT
+
V
OCM
V
OUTDIFF
0.1μF
66057 F06
R1
R
INP
V
INP
V
INM
R1
R2
R3
R3
+
+
+
R
INM
Figure 6. Input Impedance
For single-ended inputs (V
INM
= 0), the input impedance
increases over the balanced differential case due to the
fact that the summing node (at the junction of R1, R2
and R3) moves in phase with V
INP
to bootstrap the input
impedance. Referring to Figure 6 with V
INM
= 0, the input
impedance looking into either input is:
R
INP
= R
INM
R1
1
1
2
R2
R1+ R2
Input Common Mode Voltage Range
The input common mode voltage is defi ned as the average
of the two inputs into resistor R1:
V
INCM
=
V
INP
+ V
INM
2
The input common mode range is a function of the fi lter
confi guration (GAIN), V
INDIFF
and the V
OCM
potential.
Referring to Figure 6, the summing junction where R1, R2
and R3 merge together should not swing within 1.4V of
the V
+
power supply. Additionally, to avoid forward biasing
the ESD protection diodes on the input pins, neither input
should swing further than 325mV below the V
power
rail. Therefore, the input common mode voltage should
be constrained to:
V
–325mV+
V
INDIFF
2
V
INCM
1+
R1
R2
•V
+
1.4V
()
R1
R2
V
OCM
The specifi cations in the Electrical Characteristics table are
a special case of the general equation above. For a single
3V power supply, (V
+
= 3V, V
= 0V) with V
OCM
= 1.5V,
ΔV
INDIFF
= ±0.25V and R1 = R2, the valid input common
mode range is:
–200mV ≤ V
INCM
≤ 1.7V
Likewise, for a single 5V power supply, (V
+
= 5V, V
= 0V)
with V
OCM
= 2.5V, ΔV
INDIFF
= ±0.25V and R1 = R2, the valid
input common mode range is:
–200mV ≤ V
INCM
≤ 4.7V
Output Common Mode and V
OCM
Pin
The output common mode voltage is defi ned as the aver-
age of the two outputs:
V
OUTCM
= V
OCM
=
V
OUT
+
+ V
OUT
2
As the equation shows, the output common mode voltage
is independent of the input common mode voltage, and
is instead determined by the voltage on the V
OCM
pin, by
means of an internal feedback loop.
If the V
OCM
pin is left open, an internal resistor divider
develops a potential halfway between the V
+
and V
volt-
ages. The V
OCM
pin can be overdriven to another voltage
if desired. For example, when driving an ADC, if the ADC
makes a reference available for setting the common mode
voltage, it can be directly tied to the V
OCM
pin, as long as the
ADC is capable of driving the input impedance presented by
the V
OCM
pin as listed in the Electrical Characteristics table
(R
VOCM
). The Electrical Characteristics table also specifi es
the valid range that can be applied to the V
OCM
pin.
LTC6605-7
15
66057f
APPLICATIONS INFORMATION
Noise
When comparing the LTC6605-7’s noise to that of other
amplifi ers, be sure to compare similar specifi cations. Stand-
alone op amps often specify noise referred to the inputs of the
op amp. The LTC6605-7’s internal op amp has input referred
voltage noise of only 2.1nV/√Hz. In addition to the noise gen-
erated by the amplifi er, the surrounding feedback resistors
also contribute noise. A noise model is shown in Figure 7a.
The output spot noise generated by both the amplifi er
and the feedback components is given in Figure 7b.
Substituting the equation for Johnson noise of a resistor
(e
2
nR
= 4kTR) into the equation in Figure 7b and simplify-
ing gives the result shown in Figure 7c.
Board Layout and Bypass Capacitors
For single-supply applications it is recommended that a
high quality X5R or X7R, 0.1μF bypass capacitor be placed
directly between V
+
and the adjacent V
pin. The V
pins,
including the Exposed Pad, should be tied directly to a low
impedance ground plane with minimal routing.
Figure 7a. Differential Noise Model
Figure 7b
Figure 7c
e
no
= e
ni
•1+
R2
R1
2
+ 2• I
n
•R2+R3 • 1+
R2
R1
2
+ 2• e
nR1
R2
R1
2
+ 2• e
nR3
•1+
R2
R1
2
+ 2•e
nR2
2
e
no
= e
ni
•1+
R2
R
1
2
+ 2• I
n
•R2+ R3 1+
R2
R
1
2
+ 8•k•T• R2 1+
R2
R
1
+ R3 1+
R2
R
1
2
+
66057 F07a
R1
R1
R3
e
ni
2
e
no
2
e
nR3
2
R3
e
nR3
2
R2
e
nR2
2
R2
e
nR2
2
e
nR1
2
e
nR1
2
I
n
+
2
I
n
2

LTC6605CDJC-7#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Differential Amplifiers 2x Matched 7MHz Filt w/ L N, L Dist Diff
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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