1. General description
The NVT2003/04/06 is a family of bidirectional voltage level translators operational from
1.0 V to 3.6 V (V
ref(A)
) and 1.8 V to 5.5 V (V
ref(B)
), which allow bidirectional voltage
translations between 1.0 V and 5 V without the need for a direction pin in open-drain or
push-pull applications. Bit widths ranging from 3-bit to 6-bit are offered for level translation
application with transmission speeds < 33 MHz for an open-drain system with a 50 pF
capacitance and a pull-up of 197 .
When the An or Bn port is LOW, the clamp is in the ON-state and a low resistance
connection exists between the An and Bn ports. The low ON-state resistance (R
on
) of the
switch allows connections to be made with minimal propagation delay. Assuming the
higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is
limited to the voltage set by VREFA. When the An port is HIGH, the Bn port is pulled to the
drain pull-up supply voltage (V
pu(D)
) by the pull-up resistors. This functionality allows a
seamless translation between higher and lower voltages selected by the user without the
need for directional control.
When EN is HIGH, the translator switch is on, and the An I/O are connected to the Bn I/O,
respectively, allowing bidirectional data flow between ports. When EN is LOW, the
translator switch is off, and a high-impedance state exists between ports. The EN input
circuit is designed to be supplied by V
ref(B)
. To ensure the high-impedance state during
power-up or power-down, EN must be LOW.
All channels have the same electrical characteristics and there is minimal deviation from
one output to another in voltage or propagation delay. This is a benefit over discrete
transistor voltage translation solutions, since the fabrication of the switch is symmetrical.
The translator provides excellent ESD protection to lower voltage devices, and at the
same time protects less ESD-resistant devices.
2. Features and benefits
Provides bidirectional voltage translation with no direction pin
Less than 1.5 ns maximum propagation delay
Allows voltage level translation between:
1.0 V V
ref(A)
and 1.8 V, 2.5 V, 3.3 V or 5 V V
ref(B)
1.2 V V
ref(A)
and 1.8 V, 2.5 V, 3.3 V or 5 V V
ref(B)
1.8 V V
ref(A)
and 3.3 V or 5 V V
ref(B)
2.5 V V
ref(A)
and 5 V V
ref(B)
3.3 V V
ref(A)
and 5 V V
ref(B)
NVT2003/04/06
Bidirectional voltage-level translator for open-drain and
push-pull applications
Rev. 5 — 19 February 2014 Product data sheet
NVT2003_04_06 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 19 February 2014 2 of 33
NXP Semiconductors
NVT2003/04/06
Bidirectional voltage-level translator
Low 3.5 ON-state connection between input and output ports provides less signal
distortion
5 V tolerant I/O ports to support mixed-mode signal operation
High-impedance An and Bn pins for EN = LOW
Lock-up free operation
Flow through pinout for ease of printed-circuit board trace routing
ESD protection exceeds 3.5 kV HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Packages offered: TSSOP10, HXSON12, DHVQFN16, HVQFN16, TSSOP16
3. Ordering information
3.1 Ordering options
Table 1. Ordering information
Type number Topside
marking
Number
of bits
Package
Name Description Version
NVT2003DP N2003 3 TSSOP10 plastic thin shrink small outline package; 10 leads;
body width 3 mm
SOT552-1
NVT2004TL N4 4 HXSON12 plastic, thermal enhanced extremely thin small outline
package; no leads; 12 terminals;
body 1.35 2.5 0.5 mm
SOT973-2
NVT2006BQ N2006 6 DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
NVT2006BS N06 6 HVQFN16 plastic thermal enhanced very thin quad flat package;
no leads; 16 terminals; body 3 3 0.85 mm
SOT758-1
NVT2006PW NVT2006 6 TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
Table 2. Ordering options
Type number Orderable
part number
Package Packing method Minimum
order quantity
Temperature
NVT2003DP NVT2003DP,118 TSSOP10 Reel 13” Q1/T1
*Standard mark SMD
2500 T
amb
= 40 C to +85 C
NVT2004TL NVT2004TL,115 HXSON12 Reel 7” Q1/T1
*Standard mark SMD
4000 T
amb
= 40 C to +85 C
NVT2006BQ NVT2006BQ,115 DHVQFN16 Reel 7” Q1/T1
*Standard mark SMD
3000 T
amb
= 40 C to +85 C
NVT2006BS NVT2006BS,118 HVQFN16 Reel 13” Q1/T1
*Standard mark SMD
6000 T
amb
= 40 C to +85 C
NVT2006PW NVT2006PW,118 TSSOP16 Reel 13” Q1/T1
*Standard mark SMD
2500 T
amb
= 40 C to +85 C
NVT2003_04_06 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 19 February 2014 3 of 33
NXP Semiconductors
NVT2003/04/06
Bidirectional voltage-level translator
4. Functional diagram
5. Pinning information
5.1 Pinning
5.1.1 3-bit in TSSOP10 package
5.1.2 4-bit in HXSON12 package
Fig 1. Logic diagram of NVT2003/04/06 (positive logic)
002aae132
A1
An
VREFA
GND
VREFB
B1
Bn
EN
SW
SW
NVT20xx
Fig 2. Pin configuration for TSSOP10
NVT2003DP
GND EN
VREFA VREFB
A1 B1
A2 B2
A3 B3
002aae836
1
2
3
4
5
6
8
7
10
9
Fig 3. Pin configuration for HXSON12U
002aae219
NVT2004TL
Transparent top view
112GND EN
211VREFA VREFB
310A1 B1
67A4 B4
49A2 B2
58A3 B3

NVT2003DP,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Translation - Voltage Levels BI VOLT-LVL TRANSL O-DRN P-P APP
Lifecycle:
New from this manufacturer.
Delivery:
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