21
LTC1538-AUX/LTC1539
APPLICATIONS INFORMATION
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the resistance of one MOSFET can simply be summed
with the resistances of L and R
SENSE
to obtain I
2
R
losses. For example, if each R
DS(ON)
= 0.05Ω, R
L
=
0.15Ω and R
SENSE
= 0.05Ω, then the total resistance is
0.25Ω. This results in losses ranging from 3% to 10%
as the output current increases from 0.5A to 2A. I
2
R
losses cause the efficiency to roll off at high output
currents.
4. Transition losses apply only to the topside MOSFET(s)
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated from:
Transition Loss ≈ 2.5(V
IN
)
1.85
(I
MAX
)(C
RSS
)(f)
Other losses including C
IN
and C
OUT
ESR dissipative
losses, Schottky conduction losses during dead-time,
and inductor core losses, generally account for less
than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
OUT
shifts by an
amount equal to (∆I
LOAD
)(ESR) where ESR is the effective
series resistance of C
OUT
. ∆I
LOAD
also begins to charge or
discharge C
OUT
generating the feedback error signal which
forces the regulator loop to adapt to the current change
and return V
OUT
to its steady-state value. During this
recovery time V
OUT
can be monitored for overshoot or
ringing which would indicate a stability problem. The I
TH
external components shown in Figure 1 will prove ad-
equate compensation for most applications.
A second, more severe transient is caused by switching in
loads with large (> 1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(C
LOAD
).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1538-AUX/LTC1539 circuits. LTC1538-AUX/
LTC1539 V
IN
current, INTV
CC
current, I
2
R losses and
topside MOSFET transition losses.
1. The V
IN
current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET driver
and control currents. V
IN
current typically results in a
small (<< 1%) loss which increases with V
IN
.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
CC
to ground. The resulting dQ/dt is a current
out of INTV
CC
which is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
=
f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of the
topside and bottom side MOSFETs. It is for this reason
that the large topside and synchronous MOSFETs are
turned off during low current operation in favor of the
small topside MOSFET and external Schottky diode,
allowing efficient, constant-frequency operation at low
output currents.
By powering EXTV
CC
from an output-derived source,
the additional V
IN
current resulting from the driver and
control currents will be scaled by a factor of Duty Cycle/
Efficiency. For example, in a 20V to 5V application,
10mA of INTV
CC
current results in approximately 3mA
of V
IN
current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
V
IN
) to only a few percent.
3. I
2
R losses are predicted from the DC resistances of the
MOSFET, inductor and current sense R. In continuous
mode the average output current flows through L and
R
SENSE
, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same R
DS(ON)
, then
