1
®
FN8120.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X4163, X4165
16K, 2K x 8 Bit
CPU Supervisor with 16K EEPROM
FEATURES
• Selectable watchdog timer
•Low V
CC
detection and reset assertion
—Four standard reset threshold voltages
—Adjust low V
CC
reset threshold voltage using
special programming sequence
—Reset signal valid to V
CC
= 1V
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog OFF
—3mA active current
• 16Kbits of EEPROM
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Block Lock (1, 2, 4, 8 pages, all, none)
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available Packages
—8 Ld SOIC
—8 Ld TSSOP
• Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X4163, X4165 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply Volt-
age Supervision, and Serial EEPROM Memory in one
package. This combination lowers system cost,
reduces board space requirements, and increases reli-
ability.
Applying power to the device activates the power on
reset circuit which holds RESET
/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the
RESET
/RESET signal. The user selects the interval
from three preset values. Once selected, the interval
does not change, even after cycling the power.
The device’s low V
CC
detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when V
CC
falls below the set minimum V
CC
trip
point. RESET
/RESET is asserted until V
CC
returns to
proper operating level and stabilizes. Four industry
standard V
TRIP
thresholds are available, however, Inter-
sil’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
BLOCK DIAGRAM
Watchdog
Timer Reset
Data
Register
Command
Decode &
Control
Logic
SDA
SCL
V
CC
Reset &
Watchdog
Timebase
Power on and
Generation
V
TRIP
+
-
RESET (X4163)
Reset
Low Voltage
Status
Register
Protect Logic
EEPROM Array
Watchdog Transition
Detector
WP
V
CC
Threshold
Reset logic
Block Lock Control
2Kb
RESET (X4165)
S0
S1
Data Sheet November 26, 2007
N
O
T
R
E
C
O
M
M
E
N
D
E
D
F
O
R
N
E
W
D
E
S
I
G
N
S
P
O
S
S
I
B
L
E
S
U
B
S
T
I
T
U
T
E
P
R
O
D
U
C
T
I
S
L
8
8
0
1
3
