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NX3L2G384GM,125
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
NX3L2G384
All information pr
ovided in this d
ocument is su
bject to legal
disclaimers.
© NXP B.V
. 201
3. All rights rese
rved.
Product data sheet
Rev
. 7 —
26 March 2013
13 of 21
NXP Semiconductors
NX3L2G384
Dual low-ohmic single-pole
single-th
row analog switch
Adjust f
i
voltage to obtain 0 dBm level at output. Increase f
i
frequency until dB meter reads
3d
B
.
Fig 19.
T
est circu
it for measuring the frequency
response when channel is in
ON-st
ate
dB
001aaj525
nY/nZ
nE
V
IL
f
i
R
L
nZ/nY
V
CC
0.5V
CC
Adjust f
i
voltage to obtain 0 dBm level at input.
Fig 20.
T
est circuit for measuring isol
ation (OFF-st
ate)
dB
001aaj526
nY/nZ
nE
V
IH
f
i
R
L
nZ/nY
V
CC
0.5V
CC
R
L
0.5V
CC
a.
T
est circuit
b.
Input and output pulse definition
s
Fig 21.
T
est circuit for measu
ring crosstalk
voltage between digit
a
l inputs and switch
VV
O
001aaj527
R
L
C
L
R
L
V
I
nY/nZ
nZ/nY
nE
V
CC
0.5V
CC
0.5V
CC
G
001aaj528
on
off
off
logic
input (nE)
V
O
V
ct
NX3L2G384
All information pr
ovided in this d
ocument is su
bject to legal
disclaimers.
© NXP B.V
. 201
3. All rights rese
rved.
Product data sheet
Rev
. 7 —
26 March 2013
14 of 21
NXP Semiconductors
NX3L2G384
Dual low-ohmic single-pole
single-th
row analog switch
20 log
10
(V
O2
/ V
O1
) or 20 log
10
(V
O1
/ V
O2
).
Fig 22.
T
est circuit for
measuri
ng crosstalk between switches
V
V
001aai832
CHANNEL
ON
1Y or 1Z
2Y or 2Z
1E
2E
V
IL
V
IH
1Z or 1Y
0.5V
CC
0.5V
CC
2Z or 2Y
R
L
R
L
V
O1
f
i
50
Ω
R
i
50
Ω
V
O2
CHANNEL
OFF
a.
T
est circuit
b.
Input and output pulse definition
s
Definition: Q
inj
=
V
O
C
L
.
V
O
= output voltage variation.
R
gen
= generator resistance.
V
gen
= generator voltage.
Fig 23.
T
est circuit for measu
ring charge injection
V
V
O
001aaj529
C
L
R
L
R
gen
nY/nZ
nZ/nY
nE
V
CC
GND
V
gen
G
V
I
001aaj530
V
O
off
on
off
V
O
logic
input (nE)
NX3L2G384
All information pr
ovided in this d
ocument is su
bject to legal
disclaimers.
© NXP B.V
. 201
3. All rights rese
rved.
Product data sheet
Rev
. 7 —
26 March 2013
15 of 21
NXP Semiconductors
NX3L2G384
Dual low-ohmic single-pole
single-th
row analog switch
14. Package
outline
Fig 24.
Package
outline SOT833-1 (XSON8
)
terminal 1
index area
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
SOT833-1
- - -
MO-252
- - -
SOT833-1
07-11-14
07-12-07
DIMENSIONS (mm are the original dimensions)
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
D
E
e
1
e
A
1
b
L
L
1
e
1
e
1
0
1
2 mm
scale
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
0.25
0.17
2.0
1.9
0.35
0.27
A
1
max
b
E
1.05
0.95
D
ee
1
L
0.40
0.32
L
1
0.5
0.6
A
(1)
max
0.5
0.04
1
8
2
7
3
6
4
5
8
×
(2)
4
×
(2)
A
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
NX3L2G384GM,125
Mfr. #:
Buy NX3L2G384GM,125
Manufacturer:
NXP Semiconductors
Description:
Analog Switch ICs DUAL LO-OHMIC SINGLE POLE/THROW ANALOG SW
Lifecycle:
New from this manufacturer.
Delivery:
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