NCV8184
http://onsemi.com
7
External Capacitors
The output capacitor for the NCV8184 is required for
stability. Without it, the regulator output will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worstcase is determined at the minimum ambient
temperature and maximum load expected.
The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.
The capacitor must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to 40°C, a capacitor rated at that temperature
must be used.
More information on capacitor selection for SMART
REGULATORs is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through our
website at http://www.onsemi.com.
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 23) is:
PD(max) +
{
V
IN
(max) * V
OUT
(min)
}
I
OUT
(max)
) V
IN
(max)I
Q
(eq. 1)
where:
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
OUT(max)
is the maximum output current, for the
application,and
I
Q
is the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of PD(max) is known, the maximum
permissible value of R
q
JA
can be calculated:
R
qJA
+
150° C * T
A
P
D
(eq. 2)
The value of R
q
JA
can then be compared with those in the
Package Thermal Data Section of the data sheet. Those
packages with R
q
JA
s less than the calculated value in
equation 2 will keep the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
Figure 23. Single Output Regulator with Key
Performance Parameters Labeled
I
IN
I
OUT
I
Q
SMART
V
OUT
V
IN
REGULATOR
Control
Features
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
q
JA:
R
qJA
+ R
qJC
) R
qCS
) R
qSA
(eq. 3)
where:
R
q
JC
= the junctiontocase thermal resistance,
R
q
CS
= the casetoheatsink thermal resistance, and
R
q
SA
= the heatsinktoambient thermal resistance.
R
q
JC
appears in the package section of the data sheet. Like
R
q
JA
, it is a function of package type. R
q
CS
and R
q
SA
are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heatsink manufacturers.
NCV8184
http://onsemi.com
8
PACKAGE THERMAL DATA
Parameter
Conditions
Typical Value
Units
SOIC8 Package
100 mm
2
Spreader Board 645 mm
2
Spreader Board
1 oz 2 oz 1 oz 2 oz
JunctiontoPin 6 (YJL6, Y
JL6
)
53 51 50 47 °C/W
JunctiontoAmbient (R
q
JA
, q
JA
)
151 135 111 100 °C/W
Figure 24. PCB Layout and Package Construction for Simulation
Package construction
Without mold compound
NCV8184
http://onsemi.com
9
Table 1. SOIC8 THERMAL RC NETWORK MODELS*
Copper Area (1 oz thick) 100 mm
2
645 mm
2
100 mm
2
645 mm
2
Cauer Network Foster Network
100 mm
2
645 mm
2
Units Tau Tau Units
C_C1 Junction Gnd 0.0000015 0.0000015 Ws/C 1.00E-06 1.00E-06 sec
C_C2 node1 Gnd 0.0000059 0.0000059 Ws/C 1.00E-05 1.00E-05 sec
C_C3 node2 Gnd 0.0000171 0.0000171 Ws/C 1.00E-04 1.00E-04 sec
C_C4 node3 Gnd 0.0001340 0.0001340 Ws/C 1.76E-04 1.76E-04 sec
C_C5 node4 Gnd 0.0001322 0.0001323 Ws/C 0.0010 0.0010 sec
C_C6 node5 Gnd 0.0010797 0.0010811 Ws/C 0.008 0.008 sec
C_C7 node6 Gnd 0.0087127 0.0087918 Ws/C 0.150 0.150 sec
C_C8 node7 Gnd 0.0863882 0.0950421 Ws/C 3.00 3.00 sec
C_C9 node8 Gnd 0.3109255 1.0127094 Ws/C 8.96 5.15 sec
C_C10 node9 Gnd 0.8359004 1.5167041 Ws/C 52.5 68.4 sec
100 mm
2
645 mm
2
R’s R’s
R_R1 Junction node1 0.8380955 0.8380935 °C/W 0.49519 0.49519 °C/W
R_R2 node1 node2 1.9719907 1.9719679 °C/W 1.070738 1.070738 °C/W
R_R3 node2 node3 5.0213740 5.0211819 °C/W 3.385971 3.385971 °C/W
R_R4 node3 node4 3.1295806 3.1288061 °C/W 1.617537 1.617537 °C/W
R_R5 node4 node5 3.2483544 3.2468794 °C/W 5.10 5.10 °C/W
R_R6 node5 node6 6.5922506 6.5781209 °C/W 7.00 7.00 °C/W
R_R7 node6 node7 16.5499898 16.2818051 °C/W 15.00 15.00 °C/W
R_R8 node7 node8 45.3838437 34.7292748 °C/W 20.00 20.00 °C/W
R_R9 node8 node9 32.8928798 7.6862725 °C/W 28.19863 16.67727 °C/W
R_R10 node9 gnd 37.5059686 24.4060143 °C/W 71.26626 33.54171 °C/W
*Bold face items in the tables above represent the package without the external thermal system.
The Cauer networks generally have physical significance
and may be divided between nodes to separate thermal
behavior due to one portion of the network from another.
The Foster networks, though when sorted by time constant
(as above) bear a rough correlation with the Cauer networks,
are really only convenient mathematical models. Cauer
networks can be easily implemented using circuit simulating
tools, whereas Foster networks may be more easily
implemented using mathematical tools (for instance, in a
spreadsheet program), according to the following formula:
R(t) +
n
S
i + 1
R
i
ǒ
1e
tń tau
i
Ǔ

NCV8184DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 70mA Tracking
Lifecycle:
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