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SZESD8351HT1G

P1-P3P4-P6P7-P9
© Semiconductor Components Industries, LLC, 2016
May, 2016 − Rev. 8
1 Publication Order Number:
ESD8351/D
ESD8351, SZESD8351
ESD Protection Diodes
Low Capacitance ESD Protection Diode
for High Speed Data Line
The ESD8351 Series ESD protection diodes are designed to protect
high speed data lines from ESD. Ultra−low capacitance and low ESD
clamping voltage make this device an ideal solution for protecting
voltage sensitive high speed data lines.
Features
• Low Capacitance (0.55 pF Max, I/O to GND)
• Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
ISO 10605
• Low ESD Clamping Voltage
• SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• USB 2.0
• eSATA
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Rating
Symbol Value Unit
Operating Junction Temperature Range T
J
−55 to +125 °C
Storage Temperature Range T
stg
−55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
T
L
260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ISO 10605 330 pF / 2 kW Contact
ESD
ESD
ESD
±15
±15
±30
kV
kV
kV
Maximum Peak Pulse Current
8/20 ms @ T
A
= 25°C
I
pp
5.0 A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
See Application Note AND8308/D for further description of
survivability specs.
MARKING
DIAGRAMS
X3DFN2
CASE 152AF
PIN CONFIGURATION
AND SCHEMATIC
www.onsemi.com
X, XX = Specific Device Code
M = Date Code
=
1
Cathode
2
Anode
SOD−323
CASE 477
SOD−523
CASE 502
PIN 1
M
1
2
AE
M
1
2
AF
12
M
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
L
ESD8351, SZESD8351
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol Parameter
V
RWM
Working Peak Voltage
I
R
Maximum Reverse Leakage Current @ V
RWM
V
BR
Breakdown Voltage @ I
T
I
T
Test Current
V
HOLD
Holding Reverse Voltage
I
HOLD
Holding Reverse Current
R
DYN
Dynamic Resistance
I
PP
Maximum Peak Pulse Current
V
C
Clamping Voltage @ I
PP
V
C
= V
HOLD
+ (I
PP
* R
DYN
)
I
V
V
C
V
RWM
V
HOLD
V
BR
R
DYN
V
C
I
R
I
T
I
HOLD
−I
PP
R
DYN
I
PP
V
C
= V
HOLD
+ (I
PP
* R
DYN
)
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit
Reverse Working Voltage V
RWM
I/O Pin to GND 3.3 V
Breakdown Voltage V
BR
I
T
= 1 mA, I/O Pin to GND 5.5 7.0 7.8 V
Reverse Leakage Current I
R
V
RWM
= 3.3 V, I/O Pin to GND 500 nA
Holding Reverse Voltage V
HOLD
I/O Pin to GND 1.15 V
Holding Reverse Current I
HOLD
I/O Pin to GND 20 mA
Clamping Voltage
TLP (Note 2)
See Figures 1 through 11
V
C
I
PP
= 8 A IEC 61000−4−2 Level 2 equivalent
(±4 kV Contact, ±4 kV Air)
6.5
V
I
PP
= 16 A
IEC 61000−4−2 Level 4 equivalent
(±8 kV Contact, ±15 kV Air)
11.2
Clamping Voltage (Note 3) V
C
I
PP
= 5 A
t
p
= 8 x 20 ms
8.2 V
Dynamic Resistance R
DYN
Pin1 to Pin2
Pin2 to Pin1
0.62
0.59
W
Junction Capacitance C
J
V
R
= 0 V, f = 1 Mhz
V
R
= 0 V, f = 2.5 Ghz
0.37
0.35
0.55
0.45
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. For test procedure see Figures 8 and 9 and application note AND8307/D.
2. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z
0
= 50 W, t
p
= 100 ns, t
r
= 4 ns, averaging window; t
1
= 30 ns to t
2
= 60 ns.
3. Non−repetitive current pulse at T
A
= 20°C, per IEC 61000−4−5 waveform.
ESD8351, SZESD8351
www.onsemi.com
3
Figure 1. CV Characteristics
C (pF)
V
Bias
(V)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
CAPACITANCE (pF)
FREQUENCY
0
0.1
0.2
0.3
0.4
0.5
1.0
123 567 9
dB
FREQUENCY (Hz)
−14
−12
−10
−8
−6
−4
−2
0
2
1E7 1E8 1E9 1E10
20
16
14
12
8
4
2
0
02 2016141246810
TLP CURRENT (A)
V
C
, VOLTAGE (V)
3E10
m1
m2
0.6
0.7
0.8
0.9
4810
18
6
10
18
10
8
6
4
2
0
EQUIVALENT V
IEC
(kV)
20
16
14
12
8
4
2
0
02 2016141246810
TLP CURRENT (A)
V
C
, VOLTAGE (V)
18
6
10
18
10
8
6
4
2
0
EQUIVALENT V
IEC
(kV)
Figure 2. Clamping Voltage vs Peak Pulse
Current ( t
p
= 8/20 ms)
V
pk
(V)
I
pk
(A)
0
1
2
3
4
5
10
1 1.5 2 3 3.5 4 5
6
7
8
9
2.5 4.5 5.5
Figure 3. RF Insertion Loss Figure 4. Capacitance over Frequency
Figure 5. Positive TLP I−V Curve Figure 6. Negative TLP I−V Curve
6
P1-P3P4-P6P7-P9

SZESD8351HT1G

Mfr. #:
Buy SZESD8351HT1G
Manufacturer:
ON Semiconductor
Description:
TVS Diodes / ESD Suppressors LOW CAP SNAPBACK ESD PROT
Lifecycle:
New from this manufacturer.
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