NLV74HC164ADR2G

© Semiconductor Components Industries, LLC, 2012
July, 2012 Rev. 6
1 Publication Order Number:
MC74HC164A/D
MC74HC164A
8-Bit Serial-Input/Parallel-
Output Shift Register
HighPerformance SiliconGate CMOS
The MC74HC164A is identical in pinout to the LS164. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
The MC74HC164A is an 8bit, serialinput to paralleloutput shift
register. Two serial data inputs, A1 and A2, are provided so that one
input may be used as a data enable. Data is entered on each rising edge
of the clock. The activelow asynchronous Reset overrides the Clock
and Serial Data inputs.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 V to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the JEDEC Standard No. 7 A Requirements
Chip Complexity: 244 FETs or 61 Equivalent Gates
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = PbFree Package
TSSOP14
DT SUFFIX
CASE 948G
14
1
SOIC14
D SUFFIX
CASE 751A
14
1
HC164AG
AWLYWW
1
14
HC
164A
ALYWG
G
1
14
14
1
PDIP14
N SUFFIX
CASE 646
MC74HC164AN
AWLYYWWG
1
14
(Note: Microdot may be in either location)
MC74HC164A
http://onsemi.com
2
LOGIC DIAGRAM
PIN 14 = V
CC
PIN 7 = GND
3
Q
A
4
5
6
10
11
12
13
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
PARALLEL
DATA
OUTPUTS
9
RESET
CLOCK
8
SERIAL
DATA
INPUTS
A1
A2
1
2
DATA
FUNCTION TABLE
Inputs Outputs
Reset Clock A1 A2 Q
A
Q
B
Q
H
LXXXLL L
H X X No Change
HHDDQ
An
Q
Gn
HDHDQ
An
Q
Gn
D = data input
Q
An
Q
Gn
= data shifted from the preceding
stage on a rising edge at the clock input.
PIN ASSIGNMENT
11
12
13
14
8
9
105
4
3
2
1
7
6
Q
E
Q
F
Q
G
Q
H
V
CC
CLOCK
RESET
Q
B
Q
A
A2
A1
GND
Q
D
Q
C
ORDERING INFORMATION
Device Package Shipping
MC74HC164ANG PDIP14
(PbFree)
25 Units / Rail
MC74HC164ADG SOIC14
(PbFree)
55 Units / Rail
MC74HC164ADR2G SOIC14
(PbFree)
2500 / Tape & Reel
MC74HC164ADTR2G TSSOP14
(PbFree)
2500 / Tape & Reel
NLV74HC164ADR2G* SOIC14
(PbFree)
2500 / Tape & Reel
NLV74HC164ADTR2G* TSSOP14
(PbFree)
2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ100 Qualified and PPAP
Capable
MC74HC164A
http://onsemi.com
3
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) – 0.5 to + 7.0 V
V
in
DC Input Voltage (Referenced to GND) – 0.5 to V
CC
+ 0.5 V
V
out
DC Output Voltage (Referenced to GND) – 0.5 to V
CC
+ 0.5 V
I
in
DC Input Current, per Pin ± 20 mA
I
out
DC Output Current, per Pin ± 25 mA
I
CC
DC Supply Current, V
CC
and GND Pins ± 50 mA
P
D
Power Dissipation in Still Air, Plastic DIP†
SOIC Package†
TSSOP Package†
750
500
450
mW
T
stg
Storage Temperature – 65 to + 150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP, SOIC or TSSOP Package)
260
_C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Derating Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V
in
, V
out
DC Input Voltage, Output Voltage (Referenced to
GND)
0 V
CC
V
T
A
Operating Temperature, All Package Types – 55 + 125
_C
t
r
, t
f
Input Rise and Fall Time V
CC
= 2.0 V
(Figure 1) V
CC
= 4.5 V
V
CC
= 6.0 V
0
0
0
1000
500
400
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol Parameter Test Conditions
V
CC
V
Guaranteed Limit
Unit
55_C to
25_C
v 85_C v 125_C
V
IH
Minimum HighLevel Input
Voltage
V
out
= 0.1 V or V
CC
– 0.1 V
|I
out
| v 20 mA
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
V
V
IL
Maximum LowLevel Input
Voltage
V
out
= 0.1 V or V
CC
– 0.1 V
|I
out
| v 20 mA
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
V
OH
Minimum HighLevel Output
Voltage
V
in
= V
IH
or V
IL
|I
out
| v 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
in
= V
IH
or V
IL
|I
out
| v 2.4 mA
|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND v (V
in
or V
out
) v V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.

NLV74HC164ADR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Serial to Parallel Logic Converters 8-BIT SERIAL-INPUT/PARALL
Lifecycle:
New from this manufacturer.
Delivery:
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