SI91872DMP-50-E3

Si91872
Vishay Siliconix
Document Number: 72013
S-51147—Rev. F, 20-Jun-05
www.vishay.com
7
TYPICAL WAVEFORMS
Load Transient Response-1
I
LOAD
100 mA/div
V
OUT
10 mV/div
V
OUT
= 3.0 V
C
OUT
= 1 mF
I
LOAD
= 1 to 150 mA
t
rise
= 2 msec
Load Transient Response-2
V
OUT
= 3.0 V
C
OUT
= 1 mF
I
LOAD
= 150 to 1 mA
t
fall
= 2 msec
20 ms/div
I
LOAD
100 mA/div
V
OUT
10 mV/div
LineTransient Response-1
V
OUT
10 mV/div
V
IN
2 V/div
V
INSTEP
= 4 to 5 V
V
OUT
= 3 V
C
OUT
= 1 mF
C
IN
= 1 mF
I
LOAD
= 150 mA
t
rise
= 5 msec
20 ms/div
LineTransient Respons-2
V
INSTEP
= 5 to 4 V
V
OUT
= 3 V
C
OUT
= 1 mF
C
IN
= 1 mF
I
LOAD
= 150 mA
t
fall
= 5 msec
20 ms/div
20 ms/div
V
OUT
10 mV/div
V
IN
2 V/div
Si91872
Vishay Siliconix
www.vishay.com
8
Document Number: 72013
S-51147—Rev. F, 20-Jun-05
TYPICAL WAVEFORMS
Output Noise
V
OUT
200 mV/div
Noise Spectrum
4 ms/div 10 Hz
V
IN
= 4 V
V
OUT
= 3 V
I
OUT
= 150 mA
BW = 10 Hz to 100 kHz
10
0.01
1 MHz
V
IN
= 4 V
V
OUT
= 3 V
I
LOAD
= 150 mA
mVń Hz
Ǹ
Output Spectral Noise Density
FUNCTIONAL BLOCK DIAGRAM
Si91872
V
IN
Reference
+
Thermal
Sensor
Shutdown
Control
GND
ERROR
V
OUT
Reverse Polarity
Protection
Current
Limit
SD
Si91872
Vishay Siliconix
Document Number: 72013
S-51147—Rev. F, 20-Jun-05
www.vishay.com
9
DETAILED DESCRIPTION
The Si91872 is a low-noise, low drop-out and low quiescent
current linear voltage regulator, packaged in a small footprint
MLP33-5 package. The Si91872 can supply loads up to
300 mA. As shown in the block diagram, the circuit consists of
a bandgap reference, error amplifier, p-channel pass transistor
and feedback resistor string. Additional blocks, not shown in
the block diagram, include a precise current limiter, reverse
battery and current protection, and thermal sensor.
Thermal Overload Protection
The thermal overload protection limits the total power
dissipation and protects the device from being damaged.
When the junction temperature exceeds 150_C, the device
turns the p-channel pass transistor off.
Reverse Battery Protection
The Si91872 has a battery reverse protection circuitry that
disconnects the internal circuitry when V
IN
drops below the
GND voltage. There is no current drawn in such an event.
When the SD pin is hardwired to V
IN
, the user must connect
the SD
pin to V
IN
via a 100-kW resistor if reverse battery
protection is desired. Hardwiring the SD
pin directly to the V
IN
pin is allowed when reverse battery protection is not desired.
ERROR
ERROR is an open drain output that goes low when V
OUT
is
less than 4% of its normal value. To obtain a logic level output,
connect a pull-up resister from ERROR to V
OUT
or any other
voltage equal to or less than V
IN
. ERROR pin is high
impedance (off) when SD
pin is low.
Auto-Discharge
V
OUT
has an internal 100-W (typ.) discharge path to ground
when SD
pin is low for the Si91872.
Stability
The circuit is stable with only a small output capacitor equal to
6 nF/mA (= 2 mF @ 300 mA). Since the bandwidth of the error
amplifier is around 13 MHz and the dominant pole is at the
output node, the capacitor should be capacitive in this range,
i.e., for 150-mA load current, an ESR <0.2 W is necessary.
Parasitic inductance of about 10 nH can be tolerated.
Safe Operating Area
The ability of the Si91872 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
P
D
= (V
IN
– V
OUT
) * I
OUT
.
Junction temperature is defined as
T
J
= T
A
+ ((P
D
* (Rθ
JC
+ Rθ
CA
)).
To calculate the limits of performance, these equations must
be rewritten.
Allowable power dissipation is calculated using the equation
P
D
= (T
J
T
A
)/ (Rθ
JC
+ Rθ
CA
)
While allowable output current is calculated using the equation
I
OUT
= (T
J
T
A
)/ (Rθ
JC
+ Rθ
CA
) * (V
IN
– V
OUT
).
Ratings of the Si91872 that must be observed are
T
Jmax
= 125 _C, T
Amax
= 85 _C, (V
IN
– V
OUT
)
max
= 5.3 V,
Rθ
JC
= 8 _C/W.
The value of Rθ
CA
is dependent on the PC board used. The
value of Rθ
CA
for the board used in device characterization is
approximately 46 _C/W.
Figure 1 shows the performance limits graphically for the
Si91872 mounted on the circuit board used for thermal
characterization.
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0123456
Figure 1. Safe Operating Area
(A)I
OUT
V
IN
V
OUT
(V)
(V
IN
V
OUT
)
MAX
= 5.3 V
T
A
= 50_C
T
A
= 85_C
T
A
= 70_C
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?72013
.

SI91872DMP-50-E3

Mfr. #:
Manufacturer:
Vishay / Siliconix
Description:
LDO Voltage Regulators 300mA LDO 5.0V w/Error Flag
Lifecycle:
New from this manufacturer.
Delivery:
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