Three-Phase Power MOSFET Controller
A3938
8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Synchronous Rectifi cation. To reduce power con-
sumption in the external MOSFETs, during the load current
recirculation PWM-off cycle, the A3938 control logic turns
on the appropriate low-side driver only. The reverse body
diode of the power MOSFET conducts only during the dead
time required at each PWM transition, as usual. However,
unlike full synchronous rectifi cation, the opposite high-side
FET’s body diode (not the R
DSON
) will carry the re-circulat-
ing current, be self-extinguishing, and not force the motor to
reverse direction.
Dead Time. To prevent cross-conduction, it is required to
have a delay between a high-side or low-side turn-off, and
the next turn-on event. The potential for cross-conduction
occurs with synchronous rectifi cation, direction changes,
PWM, or after a bootstrap capacitor charging cycle. This
dead-time is set via a resistor from the DEAD pin to LCAP
and can be varied from 100 ns to 5.5 μs.
For a nominal case, given:
• 25°C ambient temperature, and
• 5.6 kΩ < R
dead
< 470 kΩ,
t
dead (nom,ns)
= 37 + [(11.9
×
10
-3
)
×
(R
dead
+ 500)]
For predicting worst-case overvoltage and temperature
extremes, use the following equations:
t
dead (min,ns)
= 10 + [(6.55
×
10
-3
)
×
(R
dead
+ 350)]
t
dead (max,ns)
= 63 + [(17.2
×
10
-3
)
×
(R
dead
+ 650)]
For nominal comparison with I
dead
currents, also at 25°C
ambient temperature:
I
dead
= (V
lcap
– V
be
) / (R
dead
+ R
int
)
where V
lcap
= 5 V, V
be
= 0.7 V, and R
int
= 500 Ω.
Rather than use R
dead
values near 470 kΩ, set V
dead
= 0 V,
which activates an internal (I
dead
= 10 μA) current source.
The choice of power MOSFET and external gate resistance
determines the selection of the dead-time resistor. The dead
time should be made long enough to cover the variation of
the MOSFET capacitance and gate resistor tolerances (both
external and internal to the A3938).
Decoupling. The internal reference VREG supplies
current for the gate drive circuit. As the gates are driven
high, they will require current from an external decoupling
capacitor to support the transients. This capacitor should be
placed as close as possible to the VREG pin. The value of the
capacitor should be at least 20 times larger than the bootstrap
capacitor. Additionally, a 1 nF (or larger) ceramic monolithic
capacitor should be connected between LCAP and AGND, as
close to the device pins as possible.
Protection Circuitry. The A3938 has several protection
features:
• Bootstrap Monitor. The bootstrap capacitor is charged
whenever a sink-side MOSFET is on, an Sx output goes low,
or load current recirculates. This happens constantly during
normal operation.
Note: The high side will not be allowed to turn on before the
charging has decayed to less than approximately 9 mA.
• Undervoltage. VREG supplies the low-side gate driver
and the bootstrap charge current. It is critical to ensure that
the voltages are at a proper level before enabling any of the
outputs. The undervoltage circuit is active during power-up
and signals a fault, and also coasts or brakes (depending
on the stored BRKSEL setting) the motor during that time
period, until VREG is greater than approximately 10 V. On
powering down, a fault is signaled and the motor is coasted
or braked, depending on the stored setting for BRKSEL.
• Hall Invalid. Illegal codes for the Hall sensor inputs (0,0,0
or 1,1,1) force a fault and coast the motor. Noisy Hall lines
may cause Hall code errors, and therefore faults. Additional
external pull-up loading and fi ltering may be required in
some systems.
Hint: Use dividers to the VREG terminal, than to the LCAP
terminal, because the VREG terminal has more current
capability.
• Thermal Shutdown. Junction temperatures greater than
165C cause the A3938 to signal a fault and coast the motor.
• Motor Lead. The A3938 signals a fault if the motor lead
is shorted to ground. A short-to-ground is assumed after a
high- side is turned on and greater than 2 V is measured
between the drain (VBB) and source (Sx) of the high-side
power MOSFET. This fault is cleared at the beginning of
Application Information
