Electrical characteristics STGW39NC60VD
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Equation 2
P
C
= I
C
* V
CE(SAT)
* δ
with 50% of duty cycle, V
CESAT
typical value @125 °C.
Power dissipation during ON & OFF commutations is due to the switching frequency:
Equation 3
P
SW
= (E
ON
+ E
OFF
) * freq.Typical values @ 125 °C for switching losses are used (test
conditions: V
CE
= 390 V, V
GE
= 15 V, R
G
= 10 ). Furthermore, diode recovery energy is
included in the E
ON
(see note 2), while the tail of the collector current is included in the E
OFF
measurements (see note 3).
STGW39NC60VD Test circuit
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3 Test circuit
Figure 18. Test circuit for inductive load
switching
Figure 19. Gate charge test circuit
Figure 20. Switching waveforms Figure 21. Diode recovery times waveform
Package mechanical data STGW39NC60VD
12/15
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com

STGW39NC60VD

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
IGBT Transistors N-CHANNEL MFT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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