LTC2486
10
2486fe
For more information www.linear.com/LTC2486
TYPICAL PERFORMANCE CHARACTERISTICS
Offset Error vs V
CC
(2x Speed Mode)
Offset Error vs V
REF
(2x Speed Mode)
PSRR vs Frequency at V
CC
(2x Speed Mode)
PSRR vs Frequency at V
CC
(2x Speed Mode)
PSRR vs Frequency at V
CC
(2x Speed Mode)
V
CC
(V)
2 2.5
0
OFFSET ERROR (µV)
100
250
3
4
4.5
2486 G34
50
200
150
3.5
5
5.5
V
REF
= 2.5V
V
IN
= 0V
V
IN(CM)
= GND
f
O
= GND
T
A
= 25°C
V
REF
(V)
0
OFFSET ERROR (µV)
190
200
210
3
5
2486 G35
180
170
160
1 2 4
220
230
240
V
CC
= 5V
V
IN
= 0V
V
IN(CM)
= GND
f
O
= GND
T
A
= 25°C
FREQUENCY AT V
CC
(Hz)
1
0
–20
–40
–60
–80
–100
–120
–140
1k 100k
2486 G36
10 100
10k
1M
REJECTION (dB)
V
CC
= 4.1V DC
REF
+
= 2.5V
REF
= GND
IN
+
= GND
IN
= GND
f
O
= GND
T
A
= 25°C
FREQUENCY AT V
CC
(Hz)
0
–140
RREJECTION (dB)
–120
–80
–60
–40
0
20
100
140
2486 G37
–100
–20
80
180
220
200
40
60
120 160
V
CC
= 4.1V DC ±1.4V
REF
+
= 2.5V
REF
= GND
IN
+
= GND
IN
= GND
f
O
= GND
T
A
= 25°C
FREQUENCY AT V
CC
(Hz)
30600
–60
–40
0
30750
2486 G38
–80
–100
30650 30700
30800
–120
–140
–20
REJECTION (dB)
V
CC
= 4.1V DC ±0.7V
REF
+
= 2.5V
REF
= GND
IN
+
= GND
IN
= GND
f
O
= GND
T
A
= 25°C
LTC2486
11
2486fe
For more information www.linear.com/LTC2486
PIN FUNCTIONS
f
O
(Pin 1): Frequency Control Pin. Digital input that controls
the internal conversion clock rate. When f
O
is connected
to GND, the converter uses its internal oscillator running
at 307.2kHz. The conversion clock may also be overrid
-
den by driving the f
O
pin with an external clock in order to
change the output rate and the digital filter rejection null.
SDI (Pin 2): Serial Data Input. This pin is used to select
the gain, line frequency rejection mode, 1x or 2x speed
mode, temperature sensor, as well as the input channel.
The serial data input is applied under control of the serial
clock (SCK) during the data output/input operation. The first
conversion following a new input or mode change is valid.
SCK (Pin 3): Bidirectional, Digital I/O, Clock Pin. In Internal
Serial Clock Operation mode, SCK is generated internally
and is seen as an output on the SCK pin. In External Serial
Clock Operation mode, the digital I/O clock is externally
applied to the SCK pin. The Serial Clock operation mode
is determined by the logic level applied to the SCK pin at
power up and during the most recent falling edge of CS.
CS
(Pin 4): Active LOW Chip Select. A LOW on this pin
enables the digital input/output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the data output aborts the data transfer and starts
a new conversion.
SDO (Pin 5): Three-State Digital Output. During the data
output period, this pin is used as the serial data output.
When the chip select pin is HIGH, the SDO pin is in a high
impedance state. During the conversion and sleep periods,
this pin is used as the conversion status output. When
the conversion is in progress this pin is HIGH; once the
conversion is complete SDO goes low. The conversion
status is monitored by pulling CS LOW.
GND (Pin 6): Ground. Connect this pin to a common ground
plane through a low impedance connection.
COM (Pin 7): The common negative input (IN
) for all
single ended multiplexer configurations. The voltage on
CH0 to CH3 and COM pins can have any value between
GND – 0.3V to V
CC
+ 0.3V. Within these limits, the two
selected inputs (IN
+
and IN
) provide a bipolar input range
V
IN
= (IN
+
IN
) from –0.5 • V
REF
/Gain to 0.5 • V
REF
/Gain.
Outside this input range, the converter produces unique
over-range and under-range output codes.
CH0 to CH3 (Pins 8-11): Analog Inputs. May be pro
-
grammed for single-ended or differential mode.
V
CC
(Pin 12): Positive Supply Voltage. Bypass to GND with
a 10µF tantalum capacitor in parallel with a 0.1µF ceramic
capacitor as close to the part as possible.
REF
+
(Pin 13), REF
(Pin 14): Differential Reference
Input. The voltage on these pins can have any value
between GND and V
CC
as long as the reference positive
input, REF
+
, remains more positive than the negative
reference input, REF
, by at least 0.1V. The differential
voltage V
REF
= (REF
+
REF
) sets the full-scale range
(
–0.5 • V
REF
/Gain to 0.5 • V
REF
/Gain)
for all input channels.
When performing an on-chip temperature measurement,
the minimum value of REF = 2V.
Exposed Pad (Pin 15): Ground. This pin is ground and
must be soldered to the PCB ground plane. For prototyping
purposes, this pin may remain floating.
LTC2486
12
2486fe
For more information www.linear.com/LTC2486
CS
SDO
SCK
SDI
t
1
t
3
t
7
t
8
SLEEP
t
KQMAX
CONVERSIONDATA IN/OUT
t
KQMIN
t
2
2486 TD01
Hi-Z
Hi-Z
CS
SDO
SCK
SDI
t
1
t
5
t
4
t
7
t
8
SLEEP
t
KQMAX
CONVERSIONDATA IN/OUT
t
KQMIN
t
2
2486 TD02
Hi-Z
Hi-Z
Timing Diagram Using Internal SCK (SCK HIGH with CS)
Timing Diagram Using External SCK (SCK LOW with CS)
FUNCTIONAL BLOCK DIAGRAM
TEST CIRCUITS
Figure 1. Functional Block Diagram
AUTOCALIBRATION
AND CONTROL
DIFFERENTIAL
3RD ORDER
Σ MODULATOR
DECIMATING FIR
ADDRESS
INTERNAL
OSCILLATOR
SERIAL
INTERFACE
GND
V
CC
CH0
CH1
CH2
CH3
COM
MUX
IN
+
IN
SDO
SCK
REF
+
REF
CS
SDI
f
O
(INT/EXT)
2486 F01
+
TEMP
SENSOR
1.69k
SDO
2486 TC01
Hi-Z TO V
OH
V
OL
TO V
OH
V
OH
TO Hi-Z
C
LOAD
= 20pF
1.69k
SDO
2486 TC02
Hi-Z TO V
OL
V
OH
TO V
OL
V
OL
TO Hi-Z
C
LOAD
= 20pF
V
CC
TIMING DIAGRAMS

LTC2486CDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 16-bit, 4-ch Delta Sigma ADC w/ Temp Sensor PGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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