PL130-07
DS20005598A-page 6 2016 Microchip Technology Inc.
TABLE 2-1: PIN FUNCTION TABLE
Pin Name SOIC-8L TSSOP-8L QFN-16L Type Description
GND 1, 3, 6 3 1, 2, 4, 5,
9, 14, 15
P Ground.
V
DD
4, 7 1, 7 7, 10,
11, 12
P Power supply.
DRV_SEL 8 2 13 I Drive Select input: ‘1’ for standard drive,
‘0’ for high drive output. Internal pull-up
(default is ‘1’).
CLK_IN 2 5 3 I Clock input signal. The frequency of this
signal will be reproduced at the output
(after translation to CMOS level).
CLK_OUT 5 8 8 O CMOS clock output.
OE N/A 4 16 I Output Enable. See Table 2-2 .
TABLE 2-2: OE LOGIC TABLE
Part Number OE State Output Buffer State
PL130-07 0 Tri-State
1 (default) Active
PL130-07A 0 (default) Active
1Tri-State
