25LC512
DS20005265A-page 16 2014 Microchip Technology Inc.
2.10 CHIP ERASE
The CHIP ERASE instruction will erase all bits (FFh) in
the array. A Write Enable (WREN) instruction must be
given prior to executing a CHIP ERASE. This is done
by setting CS
low and then clocking out the proper
instruction into the 25LC512. After all eight bits of the
instruction are transmitted, the CS must be brought
high to set the write enable latch.
The CHIP ERASE instruction is entered by driving the
CS
low, followed by the instruction code (Figure 2-10)
onto the SI line.
The CS
pin must be driven high after the eighth bit of
the instruction code has been given or the CHIP
ERASE instruction will not be executed. Once the CS
pin is driven high the self-timed CHIP ERASE instruc-
tion begins. While the device is executing the CHIP
ERASE instruction the WIP bit in the STATUS register
can be read to determine when the CHIP ERASE
instruction is complete.
The CHIP ERASE instruction is ignored if either of the
Block Protect bits (BP0, BP1) are not 0, meaning ¼,
½, or all of the array is protected.
FIGURE 2-10: CHIP ERASE SEQUENCE
SCK
0 2345671
SI
High-Impedance
SO
CS
111000 11
2014 Microchip Technology Inc. DS20005265A-page 17
25LC512
2.11 DEEP POWER-DOWN MODE
Deep Power-Down mode of the 25LC512 is its lowest
power consumption state. The device will not respond
to any of the Read or Write commands while in Deep
Power-Down mode and, therefore, it can be used as
an additional software write protection feature.
The Deep Power-Down mode is entered by driving CS
low, followed by the instruction code (Figure 2-11) onto
the SI line, followed by driving CS
high.
If the CS
pin is not driven high after the eighth bit of the
instruction code has been given, the device will not
execute Deep power-down. Once the CS line is driven
high there is a delay (T
DP
) before the current settles to
its lowest consumption.
All instructions given during Deep Power-Down mode
are ignored except the Read Electronic Signature
command (RDID). The RDID command will release
the device from Deep power-down and outputs the
electronic signature on the SO pin, and then returns
the device to Standby mode after delay (T
REL
)
Deep Power-Down mode automatically releases at
device power-down. Once power is restored to the
device it will power-up in the Standby mode.
FIGURE 2-11: DEEP POWER-DOWN SEQUENCE
SCK
0 2345671
SI
High-Impedance
SO
CS
100111 10
25LC512
DS20005265A-page 18 2014 Microchip Technology Inc.
2.12 RELEASE FROM DEEP
POWER-DOWN AND READ
ELECTRONIC SIGNATURE
Once the device has entered Deep Power-Down
mode all instructions are ignored except the Release
from Deep Power-down and Read Electronic Signa-
ture command. This command can also be used when
the device is not in Deep power-down to read the
electronic signature out on the SO pin unless another
command is being executed such as Erase, Program
or Write Status Register.
Release from Deep Power-Down mode and Read
Electronic Signature is entered by driving CS
low,
followed by the RDID instruction code (Figure 2-12)
and then a dummy address of 16 bits (A15-A0). After
the last bit of the dummy address is clocked in, the 8-bit
Electronic Signature is clocked out on the SO pin.
After the signature has been read out at least once,
the sequence can be terminated by driving CS
high.
After a delay of T
REL, the device will then return to
Standby mode and will wait to be selected so it can be
given new instructions. If additional clock cycles are
sent after the electronic signature has been read once,
it will continue to output the signature on the SO line
until the sequence is terminated.
FIGURE 2-12: RELEASE FROM DEEP POWER-DOWN AND READ ELECTRONIC SIGNATURE
Driving CS high after the 8-bit RDID command but before the Electronic Signature has been transmitted will still ensure
the device will be taken out of Deep Power-Down mode, as shown in Figure 2-13.
FIGURE 2-13: RELEASE FROM DEEP POWER-DOWN
SO
TREL
SO
SI
SCK
CS
0 2345671
01101011
Instruction
High-Impedance
T
REL
SI
SCK
CS
0 234567891011 21222324252627282930311
01101011
15 14 13 12 210
76543210
Instruction 16-bit Address
Electronic Signature Out
High-Impedance
0 1010010
Manufacturer’s ID = 0x29

25LC512-M/SN

Mfr. #:
Manufacturer:
Microchip Technology
Description:
EEPROM Serial EEPROM 512K 64K X 8, 2.5V MIL T
Lifecycle:
New from this manufacturer.
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