10
LT1306
Since a boost converter produces high output current
ripple, one also needs to consider the maximum ripple
current rating of the output capacitor. Capacitor reliability
will be affected if the ripple current exceeds the maximum
allowable ratings. This maximum rating is usually
specified as the RMS ripple current. In the LT1306 the
RMS output capacitor ripple current is:
I
VV
V
O
OIN
IN
For 2-cell to 5V applications, 220µF low ESR solid tanta-
lum capacitors (AVX TPS series or Sprague 593D series)
work well. To reduce output voltage ripple due to heavy
load transients or Burst Mode operation, higher capaci-
tance may be used. For through-hole applications, Sanyo
OS-CON capacitors are also good choices.
In a boost regulator, the input capacitor ripple current is
much lower. Maximum ripple current rating and input
voltage ripples are not usually of concern. A 22µF tantalum
capacitor soldered near the input pin is generally an
adequate bypass.
Bootstrap Supply
Diode D1 and capacitor C1 generate a pulsating supply
voltage, V
CAP
, which is higher than the output. The rectifier
drive circuit runs off this supply. During rectifier on-time,
the rectifier base current drains C1. Q2 base current and
the maximum allowable V
CAP
ripple voltage determine the
size of C1. A 1µF capacitor is sufficient to keep V
CAP
ripple
below 0.3V. For a 2-cell input (V
IN
> 1.8V) over an extended
temperature range, a BAT54 Schottky diode may be used
for D1. The use of a Schottky diode increases the bootstrap
voltage and the operating headroom for the rectifier driver,
X5. Diodes like a 1N4148 or 1N914 work well for 2-cell
inputs over the 0°C to 70°C commercial temperature
range.
The charge drawn from C1 during the rectifier on-time has
to be replenished during the switch on-interval. As duty
cycle decreases, the amplitude of the C1 charging current
can increase dramatically especially when delivering high
power to the load. This charging current flows through the
switch and can cause the current limit comparator to trip
erratically. For boost applications where V
IN
is a few tenths
of a volt below V
O
, a 1µF or 2.2µF tantalum capacitor (such
as AVX TAJ series) can be used for C1. The ESR of the
tantalum capacitor limits the charging current. A low value
resistor (2 to 5) can also be added in series with C1 for
further limiting the charging current although this tends to
lower the converter efficiency slightly.
Frequency Compensation
Current mode switching regulators have two feedback
loops. The inner current feedback loop controls the
inductor current in response to the outer loop. The outer
or overall feedback loop tightly regulates the output
voltage. The high frequency gain asymptote of the inner
current loop rolls off at –20dB/decade and crosses the
unity gain axis at a frequency ω
c
between 1/6 to 2/3 of the
switching frequency. The current loop is stable and is
wideband compared to the overall voltage feedback loop.
The low frequency current loop gain is not high (usually
between unity and 10) but it increases the low frequency
impedance of the inductor as seen by the output filter
capacitor. (In a boost regulator, the inductor is con-
nected to the output during the switch off-time.) Current
mode control introduces an effective series resistance
(>>DCR) to the inductor that damps the LC tank re-
sponse. The complex high-Q poles of the LC filter are now
separated, resulting in a dominant pole determined by
the filter capacitance and the load resistance and a
second high frequency pole.
For a boost regulator the control to output transfer func-
tion can be shown to have a dominant pole at the load
corner frequency
ω
P
L
O
R
C
=
()
1
2
and a moving right-half plane (RHP) zero with a minimum
value of
ω
Z
L MAX
RD
L
=
()
1
2
APPLICATIONS INFORMATION
WUU
U
11
LT1306
where
R MaximumLoad
Output Voltage
MaximumDCLoadCurrent
D MaximumConverter Duty Cycle
L
MAX
==
=
=
+
+
VV
V
O IN MIN
O
–.
.
()
05
01
There is also a second pole at the current loop crossover
frequency ω
C
(Figure 6). ω
Z
is much lower in frequency
than ω
C
. The loop is compensated by adjusting the midband
gain with resistor R3 (Figure 7) so that the overall loop gain
crosses 0dB before the minimum frequency RHP zero
(i.e., corresponding to the highest duty ratio). The value of
R3 can be estimated with the fromula:
R
VDCR
L
O MAX O L
3
390 1
=
(– )
Due to the low transconductance of the error amplifier, the
gain setting resistor R3 is AC-coupled with capacitor C
Z
.
This prevents R3 from inducing an offset to the input of the
error amplifier. It also creates a pole at DC and a low
frequency zero.
The amplitude response of the error amplifier with the
compensation network shown is:
ˆ
ˆ
••
••
V
V
g
R
RR
SR C
SC SR C
CC
C
O
m
Z
ZP
ZP
=
+
+
()
+
()
[]
>>
2
12
13
13
APPLICATIONS INFORMATION
WUU
U
The low frequency zero 1/R3C
Z
of the compensation
network is placed at ω
P
/2.
C
R
Z
P
=
2
3ω
The capacitor C
P
ensures adequate gain margin beyond
the RHP zero. The high frequency pole 1/R3C
P
of the
amplifier frequency response is placed beyond ω
Z
.
C
R
P
Z
=
1
33ω
Higher output filter capacitance rolls off the gain response
from a lower corner frequency so higher midband gain is
required in the compensation network to make the overall
loop gain cross 0dB just below ω
Z
.
Layout Consideration
To minimize EMI and high frequency resonances, it is
essential to keep the SW and the CAP trace leads as short
as possible. The input and the output bypass capacitors
C
IN
and C
OUT
should be placed close to the IC package and
soldered to the ground plane. A ground plane under the
switching regulator is highly recommended. Figure 8
shows a suggested component placement and PC board
layout.
12
LT1306
0
1306 F06
AMOUNT OF
MIDBAND GAIN
NEEDED
GAIN
(dB)
1
(R3)(C
Z
)
1
(g
m
)(R3)(R2)
R1 + R2
MIDBAND GAIN =
ˆ
V
O
ˆ
V
C
ˆ
V
C
ˆ
V
O
ω
ω
Z
ω
C
CURRENT LOOP
CROSSOVER
FREQUENCY
OVERALL LOOP GAIN
AFTER COMPENSTION
AMPLITUDE RESPONSE
OF THE ERROR AMPLIFIER
AMPLITUDE RESPONSE OF
CONTROL-TO-OUTPUT
TRANSFER FUNCTION BEFORE
COMPENSATION
R
L
(1 – D
MAX
)
2
L
RHP ZERO =
R
L
2
()
(C
O
)
ω
P
FREQUENCY
1
3
ω
Z
LOOP GAIN
CROSSOVER
Figure 6. Gain Asymptotes of the Control-to-Output
ˆ
ˆ
V
V
O
C
and Error Amplifier
ˆ
ˆ
V
V
C
O
Transfer Function
Figure 7. Current Mode Boost Converter Overall-Loop Compensation
APPLICATIONS INFORMATION
WUU
U
+
g
m
V
C
V
IN
L
V
O
1.24V
LT1306
1306 F07
PWM CONTROL
LOGIC
Q1
R1
FB
R2 R
L
I
O
R3
C
Z
C
P
C
O
GND
Q2
RECTIFIER
SW

LT1306ES8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Sync, Fixed Freq Boost DC/DC Conv
Lifecycle:
New from this manufacturer.
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