6
LT1306
PIN FUNCTIONS
UUU
V
C
(Pin 1): Compensation Pin for Error Amplifier. V
C
is
the output of the transconductance error amplifier. Loop
frequency compensation is done by connecting an RC
network from the V
C
pin to ground.
FB (Pin 2): Inverting Input of the Error Amplifier. Connect
the resistor divider tap here. Set output voltage according
to V
OUT
= 1.24V (1 + R1/R2).
V
OUT
(Pin 3): Output of the Switching Regulator and Emit-
ter of the Synchronous Rectifier. Connect appropriate
output capacitor from here to ground. V
OUT
must be kept
below 5.5V.
GND (Pin 4): Ground. Connect to local ground plane.
SW (Pin 5): Switch Pin. The collectors of the grounded
power switch and the synchronous rectifier. Keep the SW
trace as short as possible to minimize EMI.
CAP (Pin 6): Power Supply to the Synchronous Rectifier
Driver. The bootstrap capacitor and the blocking diode
are tied to this pin. The CAP voltage switches between a
low level of V
IN
– V
D
to a high level determined by the V
SW
high level.
V
IN
(Pin 7): Supply or Battery Input Pin. Must be closely
bypassed to ground plane.
S/S (Pin 8): Shutdown and Synchronization Pin. Shut-
down is active low with a typical threshold of 0.9V. For
normal operation, the S/S pin is tied to V
IN
. To externally
synchronize the switching regulator, drive the S/S pin
with a pulse train.
BLOCK DIAGRA
W
Figure 2. LT1306 Block Diagram
–
+
A1
g
m
–
+
–
+
–
+
V
C
V
B
–
+
++
2
1
V
IN
A4
7
FB
8S/S
4
GND
PWM CONTROL
1306 F02
5
1.24V
1.65V
UVLO
Σ
RAMP
COMPENSATION
REF/BIAS
SHUTDOWN
DELAY
SHDN
SYNC
300kHz OSC
CLK
IDLE
SW
X5
X4
6
CAP
S
Q
R
Q1
Q2
I
RECT
> 0
I
RECT
R
S
A2
SENSE
AMP
DCM
CONTROL
3
OUT
RECTIFIER
+
V
CE2
–
X1
X2
X4
X3
A5
A3
