LTC4441/LTC4441-1
7
44411fa
pin FuncTions
PGND (Pin 1/Pin 1): Driver Ground. Connect the DRV
CC
bypass capacitor directly to this pin, as close as possible
to the IC. In addition, connect the PGND and SGND pins
together close to the IC, and then connect this node to the
source of the power MOSFET (or current sense resistor)
with as short and wide a PCB trace as possible.
BLANK (Pin 2/NA): Current Sense Blanking Output. Use
this pin to assert a blanking time in the power MOSFETs
source current sense signal. The LTC4441 pulls this open-
drain output to SGND if the driver output is low. The output
becomes high impedance after a programmable blanking
time from the driver leading edge output. This blanking
time can be adjusted with the RBLANK pin.*
RBLANK (Pin 3/NA): Blanking Time Adjust Input. Connect
a resistor from this pin to SGND to set the blanking time.
A small resistor value gives a shorter delay. Leave this pin
floating if the BLANK pin is not used.*
SGND (Pin 4/Pin 2): Signal Ground. Ground return for the
DRV
CC
regulator and low power circuitry.
IN (Pin 5/Pin 3): Driver Logic Input. This is the noninverting
driver input under normal operating conditions.
EN/SHDN (Pin 6/Pin 4): Enable/Shutdown Input. Pulling
this pin above 1.21V allows the driver to switch. Pulling
this pin below 1.09V forces the driver output to go low.
Pulling this pin below 0.45V forces the LTC4441/LTC4441-1
into shutdown mode; the DRV
CC
regulator turns off and
the supply current drops below 12μA.
FB (Pin 7/Pin 5): DRV
CC
Regulator Feedback Input. Connect
this pin to the center tap of an external resistive divider
between DRV
CC
and SGND to program the DRV
CC
regulator
output voltage. To ensure loop stability, use the value of
330kΩ for the top resistor, R1.
V
IN
(Pin 8/Pin 6): Main Supply Input. This pin powers the
DRV
CC
linear regulator. Bypass this pin to SGND with a
1μF ceramic, tantalum or other low ESR capacitor in close
proximity to the LTC4441/LTC4441-1.
DRV
CC
(Pin 9/Pin 7): Linear Regulator Output. This output
pin powers the driver and the control circuitry. Bypass this
pin to PGND using a 10μF ceramic, low ESR (X5R or X7R)
capacitor in close proximity to the LTC4441/LTC4441-1.
OUT (Pin 10/Pin 8): Driver Output.
GND (Exposed Pad Pin 11/NA): Ground. The exposed pad
must be soldered to the PCB ground.
(MSOP/SO-8)
*Available only on the 10-lead version of the LTC4441.
LTC4441/LTC4441-1
8
44411fa
block DiagraM
1.09V
IN
1.21V
+
UVLO
REG
EN
INB
1.21V
0.45V
SHUTDOWN
FB
V
IN
EN/SHDN
SGND
SHDN
THERMAL
SHUTDOWN
BIAS
LEADING
EDGE DELAY
Q1
P1
M
REG
DRV
CC
OUT
PGND
RBLANK
BLANK
4441 BD
N1
MB
FOR 10-LEAD
LTC4441
ONLY
LTC4441/LTC4441-1
9
44411fa
applicaTions inForMaTion
Overview
Power MOSFETs generally account for the majority of
power lost in a converter. It is important to choose not only
the type of MOSFET used, but also its gate drive circuitry.
The LTC4441/LTC4441-1 is designed to drive an N-channel
power MOSFET with little efficiency loss. The LTC4441/
LTC4441-1 can deliver up to 6A of peak current using a
combined NPN Bipolar and MOSFET output stage. This
helps to turn the power MOSFET fully “on” or “off” with
a very brief transition region.
The LTC4441/LTC4441-1 includes a programmable linear-
regulator to regulate the gate drive voltage. This regulator
provides the flexibility to use either standard threshold or
logic level MOSFETs.
DRV
CC
Regulator
An internal, P-channel low dropout linear regulator provides
the DRV
CC
supply to power the driver and the pre-driver
logic circuitry as shown in Figure 1. The regulator output
voltage can be programmed between 5V and 8V with an
external resistive divider between DRV
CC
and SGND and a
center tap connected to the FB pin. The regulator needs an
R1 value of around 330k to ensure loop stability; the value
of R2 can be varied to achieve the required DRV
CC
voltage:
R2 =
406k
DRV
CC
1.21V
The DRV
CC
regulator can supply up to 100mA and is
short-circuit protected. The output must be bypassed
to the PGND pin in very close proximity to the IC pins
with a minimum of 10µF ceramic, low ESR (X5R or X7R)
capacitor. Good bypassing is necessary as high transient
supply currents are required by the driver. If the input
supply voltage, V
IN
, is close to the required gate drive
voltage, this regulator can be disabled by connecting the
DRV
CC
and FB pins to V
IN
.
The LTC4441/LTC4441-1 monitors the FB pin for DRV
CC
’s
UVLO condition (UVLO in Figure 1). During power-up, the
driver output is held low until the DRV
CC
voltage reaches
90% of the programmed value. Thereafter, if the DRV
CC
voltage drops more than 20% below the programmed
value, the driver output is forced low.
Logic Input Stage
The LTC4441/LTC4441-1 driver employs TTL/CMOS com-
patible input thresholds that allow a low voltage digital
signal to drive standard power MOSFETs. The LTC4441/
LTC4441-1 contains an internal voltage regulator that
biases the input buffer, allowing the input thresholds (V
IH
= 2.4V, V
IL
= 1.4V) to be independent of the programmed-
driver supply, DRV
CC
, or the input supply, V
IN
. The 1V
hysteresis between V
IH
and V
IL
eliminates false triggering
due to noise during switching transitions. However, care
should be taken to isolate this pin from any noise pickup,
especially in high frequency, high voltage applications.The
LTC4441/LTC4441-1 input buffer has high input impedance
and draws negligible input current, simplifying the drive
circuitry required for the input. This input can withstand
voltages up to 15V above and below ground. This makes
the chip more tolerant to ringing on the input digital signal
caused by parasitic inductance.
1.09V
OUT
C
VCC
4441 F01
1.21V
UVLO
DRIVER
ENABLE
DRIVER
M
REG
FB
R2
R1
330k
+
V
IN
DRV
CC
PGND
REG
LTC4441
Figure 1. DRV
CC
Regulator

LTC4441MPMSE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Gate Drivers N-Ch MOSFET Gate Drvr
Lifecycle:
New from this manufacturer.
Delivery:
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