REV. C
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a
AD744
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2000
Precision, 500 ns Settling
BiFET Op Amp
CONNECTION DIAGRAMS
TO-99 (H) Package
FEATURES
AC PERFORMANCE
500 ns Settling to 0.01% for 10 V Step
1.5 s Settling to 0.0025% for 10 V Step
75 V/s Slew Rate
0.0003% Total Harmonic Distortion (THD)
13 MHz Gain Bandwidth – Internal Compensation
>200 MHz Gain Bandwidth (G = 1000)
External Decompensation
>1000 pF Capacitive Load Drive Capability with
10 V/s Slew Rate – External Compensation
DC PERFORMANCE
0.5 mV max Offset Voltage (AD744B)
10 V/C max Drift (AD744B)
250 V/mV min Open-Loop Gain (AD744B)
Available in Plastic Mini-DIP, Plastic SOIC, Hermetic
Cerdip, Hermetic Metal Can Packages and Chip Form
Surface Mount (SOIC) Package Available in Tape and
Reel in Accordance with EIA-481A Standard
APPLICATIONS
Output Buffers for 12-Bit, 14-Bit and 16-Bit DACs,
ADC Buffers, Cable Drivers, Wideband
Preamplifiers and Active Filters
PRODUCT DESCRIPTION
The AD744 is a fast-settling, precision, FET input, monolithic
operational amplifier. It offers the excellent dc characteristics
of the AD711 BiFET family with enhanced settling, slew rate,
and bandwidth. The AD744 also offers the option of using
custom compensation to achieve exceptional capacitive load
drive capability.
The single-pole response of the AD744 provides fast settling:
500 ns to 0.01%. This feature, combined with its high dc preci-
sion, makes it suitable for use as a buffer amplifier for 12-bit,
14-bit or 16-bit DACs and ADCs. Furthermore, the AD744’s low
total harmonic distortion (THD) level of 0.0003% and gain band-
width product of 13 MHz make it an ideal amplifier for demanding
audio applications. It is also an excellent choice for use in active
filters in 12-bit, 14-bit and 16-bit data acquisition systems.
The AD744 is internally compensated for stable operation as a
unity gain inverter or as a noninverting amplifier with a gain of
two or greater. External compensation may be applied to the
AD744 for stable operation as a unity gain follower. External
compensation also allows the AD744 to drive 1000 pF capacitive
loads, slewing at 10 V/µs with full stability.
Alternatively, external decompensation may be used to increase
the gain bandwidth of the AD744 to over 200 MHz at high
gains. This makes the AD744 ideal for use as ac preamps in
digital signal processing (DSP) front ends.
The AD744 is available in five performance grades. The AD744J
and AD744K are rated over the commercial temperature range
of 0° C to +70°C. The AD744A and AD744B are rated over
the industrial temperature range of –40°C to +85°C. The AD744T
is rated over the military temperature range of –55°C to +125°C
and is available processed to MIL-STD-883B, Rev. C.
The AD744 is available in an 8-lead plastic mini-DIP, 8-lead
small outline, 8-lead cerdip or TO-99 metal can.
PRODUCT HIGHLIGHTS
1. The AD744 is a high-speed BiFET op amp that offers excel-
lent performance at competitive prices. It outperforms the
OPA602/OPA606, LF356 and LF400.
2. The AD744 offers exceptional dynamic response. It settles to
0.01% in 500 ns and has a 100% tested minimum slew rate
of 50 V/µs (AD744B).
3. The combination of Analog Devices’ advanced processing
technology, laser wafer drift trimming and well-matched
ionimplanted JFETs provide outstanding dc precision. Input
offset voltage, input bias current, and input offset current are
specified in the warmed-up condition; all are 100% tested.
8-Lead Plastic Mini-DIP (N)
8-Lead SOIC (R) Package and
8-Lead Cerdip (Q) Packages
AD744* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
EVALUATION KITS
Universal Evaluation Board for Single High Speed
Operational Amplifiers
DOCUMENTATION
Application Notes
AN-232: Bootstrapped IC Substrate Lowers Distortion in
JFET Op Amps
AN-348: Avoiding Passive-Component Pitfalls
AN-402: Replacing Output Clamping Op Amps with Input
Clamping Amps
AN-417: Fast Rail-to-Rail Operational Amplifiers Ease
Design Constraints in Low Voltage High Speed Systems
AN-581: Biasing and Decoupling Op Amps in Single
Supply Applications
Data Sheet
AD744: Precision, 500 ns Settling BiFET Op Amp Data
Sheet
User Guides
UG-135: Evaluation Board for Single, High Speed
Operational Amplifiers (8-Lead SOIC and Exposed Paddle)
TOOLS AND SIMULATIONS
Analog Filter Wizard
Analog Photodiode Wizard
Power Dissipation vs Die Temp
VRMS/dBm/dBu/dBV calculators
AD744 SPICE Macro-Model
REFERENCE MATERIALS
Tutorials
MT-032: Ideal Voltage Feedback (VFB) Op Amp
MT-033: Voltage Feedback Op Amp Gain and Bandwidth
MT-047: Op Amp Noise
MT-048: Op Amp Noise Relationships: 1/f Noise, RMS
Noise, and Equivalent Noise Bandwidth
MT-049: Op Amp Total Output Noise Calculations for
Single-Pole System
MT-050: Op Amp Total Output Noise Calculations for
Second-Order System
MT-052: Op Amp Noise Figure: Don't Be Misled
MT-053: Op Amp Distortion: HD, THD, THD + N, IMD,
SFDR, MTPR
MT-056: High Speed Voltage Feedback Op Amps
MT-058: Effects of Feedback Capacitance on VFB and CFB
Op Amps
MT-059: Compensating for the Effects of Input
Capacitance on VFB and CFB Op Amps Used in Current-to-
Voltage Converters
MT-060: Choosing Between Voltage Feedback and
Current Feedback Op Amps
DESIGN RESOURCES
AD744 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD744 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
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REV.C
–2–
AD744–SPECIFICATIONS
(@ +25C and 15 V dc, unless otherwise noted)
AD744J/A/S AD744K/B/T
Model Conditions Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE
1
Initial Offset 0.3 1.0 0.25 0.5 mV
Offset T
MIN
to T
MAX
2 1.0 mV
vs. Temp. 5 20 5 10 µV/°C
vs. Supply
2
82 95 88 100 dB
vs. Supply T
MIN
to T
MAX
82 88 dB
Long-Term Stability 15 15 µV/month
INPUT BIAS CURRENT
3
Either Input V
CM
= 0 V 30 100 30 100 pA
Either Input @ T
MAX
=V
CM
= 0 V
J, K 70°C 0.7 2.3 0.7 2.3 nA
A, B, C 85°C 1.9 6.4 1.9 6.4 nA
S, T 125°C 31 102 31 102 nA
Either Input V
CM
= +10 V 40 150 40 150 pA
Offset Current V
CM
= 0 V 20 50 10 50 pA
Offset Current @ T
MAX
=V
CM
= 0 V
J, K 70°C 0.4 1.1 0.2 1.1 nA
A, B, C 85°C 1.3 3.2 0.6 3.2 nA
S, T 125°C20521052nA
FREQUENCY RESPONSE
Gain BW, Small Signal G = –1 8 13 9 13 MHz
Full Power Response V
O
= 20 V p-p 1.2 1.2 MHz
Slew Rate, Unity Gain G = –1 45 75 50 75 V/µs
Settling Time to 0.01%
4
G = –1 0.5 0.75 0.5 0.75 µs
Total Harmonic f = 1 kHz
Distortion R1 2 k
V
O
= 3 V rms 0.0003 0.0003 %
INPUT IMPEDANCE
Differential 3 10
12
||5.5 3 10
12
||5.5 Ω||pF
Common Mode 3 10
12
||5.5 3 10
12
||5.5 Ω||pF
INPUT VOLTAGE RANGE
Differential
5
±20 ±20 V
Common-Mode Voltage +14.5, –11.5 +14.5, –11.5 V
Over Max Operating Range
6
–11 +13 –11 +13 V
Common-Mode
Rejection Ratio V
CM
= ±10 V 78 88 82 88 dB
T
MIN
to T
MAX
76 84 80 84 dB
V
CM
= ±11 V 72 84 78 84 dB
T
MIN
to T
MAX
70 80 74 80 dB
INPUT VOLTAGE NOISE 0.1 to 10 Hz 2 2 µV p-p
f = 10 Hz 45 45 nV/Hz
f = 100 Hz 22 22 nV/Hz
f = 1 kHz 18 18 nV/Hz
f = 10 kHz 16 16 nV/Hz
INPUT CURRENT NOISE f = 1 kHz 0.01 0.01 pA/Hz
OPEN LOOP GAIN
7
V
O
= ±10 V
R
LOAD
2 k 200 400 250 400 V/mV
T
MIN
to T
MAX
100 100 V/mV
OUTPUT CHARACTERISTICS
Voltage R
LOAD
2 k +13, –12.5 +13.9, –13.3 +13, –12.5 +13.9, –13.3 V
T
MIN
to T
MAX
±12 +13.8, –13.1 ±12 +13.8, –13.1 V
Current Short Circuit 25 25 mA
Capacitive Load
8
Gain = –1 1000 1000 pF
POWER SUPPLY
Rated Performance ±15 ±15 V
Operating Range ± 4.5 ±18 ± 4.5 ±18 V
Quiescent Current 3.5 5.0 3.5 4.0 mA
NOTES
1
Input offset voltage specifications are guaranteed after 5 minutes of operation at T
A
= +25°C.
2
PSRR test conditions: +V
S
= 15 V, –V
S
= –12 V to –18 V and +V
S
= +12 V to +18 V, –V
S
= –15 V.
3
Bias Current Specifications are guaranteed maximum at either input after 5 minutes of operation at T
A
= +25°C. For higher temperature, the current doubles every 10°C.
4
Gain = –1, R
L
= 2 k, C
L
= 10 pF, refer to Figure 25.
5
Defined as voltage between inputs, such that neither exceeds ±10 V from ground.
6
Typically exceeding –14.1 V negative common-mode voltage on either input results in an output phase reversal.
7
Open-Loop Gain is specified with V
OS
both nulled and unnulled.
8
Capacitive load drive specified for C
COMP
= 20 pF with the device connected as shown in Figure 32. Under these conditions, slew rate = 14 V/µs and 0.01% settling time = 1.5 µs typical.
Refer to Table II for optimum compensation while driving a capacitive load.
Specifications subject to change without notice. All min and max specifications are guaranteed.

AD744JRZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers Prec 500ns Settling BiFET
Lifecycle:
New from this manufacturer.
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