REV.C
–12–
AD744
C00833a-0-7/00 (rev. C)
PRINTED IN U.S.A.
In either case, the capacitance C
X
causes the system to go from
a one-pole to a two-pole response; this additional pole increases
settling time by introducing peaking or ringing in the op amps
output. If the value of C
X
can be estimated with reasonable accu-
racy, Equation 2 can be used to choose the correct value for
a small capacitor, C
L
, which will optimize amplifier response. If
the value of C
X
is not known, C
L
should be a variable capacitor.
As an aid to the designer, the optimum value of C
L
for one spe-
cific amplifier connection can be determined from the graph of
Figure 41. This graph has been produced for the case where the
AD744 is connected as in Figures 39 and 40 with a practical
minimum value for C
STRAY
of 2 pF and a total C
X
value of 7.5 pF.
The approximate value of C
L
can be determined for almost any
application by solving Equation 2. For example, the AD565/
AD744 circuit of Figure 34 constrains all the variables of Equa-
tion 2 (G
N
= 3.25, R = 10 k, F
O
= 13 MHz, and C
X
= 32.5 pF)
Therefore, under these conditions, C
L
= 10.5 pF.
VALUE OF RESISTOR
100
VALUE OF CAPACITOR C
LEAD
pF
35
0
1k 10k 100k
30
25
20
15
10
5
IN THIS REGION
C
LEAD
= 0pF
G
N
= 1 TO
G
N
= 1.5
G
N
= 2
G
N
= 3
G
N
= 1
Figure 41. Practical Values of C
L
vs. Resistance of R
for Various Amplifier Noise Gains
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
TO-99 (H) Package
5
4
0.034 (0.86)
0.028 (0.71)
0.045 (1.1)
0.020 (0.51)
BOTTOM VIEW
6
2
8
7
3
1
0.2 (5.1) TYP
45°
EQUALLY
SPACED
0.185 (4.70)
0.165 (4.19)
REFERENCE PLANE
0.5 (12.70)
MIN
0.019 (0.48)
0.016 (0.41)
DIA
8 LEADS
0.04 (1.0) MAX
SEATING PLANE
0.335 (8.50)
0.305 (7.75)
0.370 (9.40)
0.335 (8.50)
INSULATION
0.05 (1.27) MAX
Mini-DIP (N) Package
0.39 (9.91)
MAX
8
14
5
PIN 1
0.10 (2.54)
TYP
0.25
(6.35)
0.31
(7.87)
SEATING
PLANE
0.125 (3.18)
MIN
0.165 0.01
(4.19 0.25)
0.035 0.01
(0.89 0.25)
0.18 0.03
(4.57 0.76)
0.018 0.003
(0.46 0.08)
0.033
(0.84)
NOM
0.30 (7.62)
REF
0-15
0.011 0.003
(0.28 0.08)
Cerdip (Q) Package
1
4
85
0.310 (7.87)
0.220 (5.59)
PIN 1
0.005 (0.13)
MIN
0.055 (1.35)
MAX
0.1 (2.54) BSC
15°
0°
0.32 (8.13)
0.29 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.20 (5.08)
MAX
0.405 (10.29) MAX
0.15
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.07 (1.78)
0.03 (0.76)
0.06 (1.52)
0.015 (0.38)
Small Outline (SO-8) Package
0.011 0.002
(0.269 0.03)
0.033 0.017
(0.83 0.43)
SEATING
PLANE
0.008 0.004
(0.203 0.075)
0.098 0.006
(2.49 0.23)
0.017 0.003
(0.42 0.07)
85
41
PIN 1
0.050 (1.27)
BSC
0.193 0.008
(4.90 0.10)
0.154 0.004
(3.91 0.10)
0.236 0.012
(6.00 0.20)

AD744KNZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers Prec 500ns Settling BiFET
Lifecycle:
New from this manufacturer.
Delivery:
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