AD5111/AD5113/AD5115 Data Sheet
Rev. B | Page 10 of 24
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 6.
Parameter
Rating
V
DD
to GND 0.3 V to +7.0 V
V
LOGIC
to GND 0.3 V to +7.0 V
V
A
, V
W
, V
B
to GND GND 0.3 V to V
DD
+ 0.3 V
I
A
, I
W
, I
B
Pulsed
1
Frequency > 10 kHz
R
AW
= 5 kΩ and 10 kΩ
±6 mA/d
2
R
AW
= 80 kΩ
±1.5 mA/d
2
Frequency ≤ 10 kHz
R
AW
= 5 kΩ and 10 kΩ
±6 mA/√d
2
R
AW
= 80 kΩ
±1.5 mA/√d
2
Continuous
R
AW
= 5 kΩ and 10 kΩ ±6 mA
R
AW
= 80 kΩ
±1.5 mA
Digital Inputs U/
D
,
CLK
, and
CS
0.3 V to +7 V or V
DD
+ 0.3 V
(whichever is less)
Operating Temperature Range
3
40°C to +125°C
Maximum Junction Temperature (T
J
Max) 150°C
Storage Temperature Range 65°C to +150°C
Reflow Soldering
Peak Temperature 260°C
Time at Peak Temperature 20 sec to 40 sec
Package Power Dissipation (T
J
max − T
A
)/θ
JA
1
Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.
2
Pulse duty factor.
3
Includes programming of EEPROM memory.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is defined by JEDEC specification JESD-51, and the value is
dependent on the test board and test environment.
Table 7. Thermal Resistance
Package Type θ
JA
θ
JC
Unit
8-Lead LFCSP 90
1
25 °C/W
1
JEDEC 2S2P test board, still air (0 m/sec air flow).
ESD CAUTION
Data Sheet AD5111/AD5113/AD5115
Rev. B | Page 11 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD5
11
1/
AD51
13/
AD5
1
15
3W
4
B
1
V
DD
2A
6
CLK
5 GND
TO
P
VIEW
(Not to Scale)
8 CS
7 U/D
09654-006
NOTES
1. THE EXPOSED PAD IS INTERNALL
Y
FLOATING.
Figure 5. Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Positive Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10
µF capacitors.
2 A Terminal A of RDAC. GND ≤ V
A
≤ V
DD
.
3 W Wiper Terminal of RDAC. GND ≤ V
W
≤ V
DD
.
4
B
Terminal B of RDAC. GND ≤ V
B
≤ V
DD
.
5
GND
Ground Pin, Logic Ground Reference.
6
CLK
Clock Input. Each clock pulse executes the step-up or step-down of the resistance. The direction is determined
by the state of the U/
D
pin.
CLK
is a negative edge trigger. Data can be transferred at rates up to 50 MHz.
7 U/
D
Up/Down Selection Counter Control.
8
CS
Chip Select. Active Low.
EPAD Exposed Pad. The exposed pad is internally floating.
AD5111/AD5113/AD5115 Data Sheet
Rev. B | Page 12 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
–0.06
–0.04
CODE (Decimal)
R-INL (LSB)
–0.02
0
0.02
0.04
0.06
0.08
0.10
0
7
14
21
28
35
42
49
56
63
70
77
84
91
98
105
1
12
119
127
10kΩ, –40°C
10kΩ, +25°C
10kΩ, +125°C
80kΩ, –40°C
80kΩ, +25°C
80kΩ, +125°C
09654-007
Figure 6. R-INL vs. Code (AD5111)
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
0.08
0
3
6
9
12
15
18
21 24 27 30 33
36
39 42
45
48 51
54 57
60
63
5kΩ, –40°C
5kΩ, +25°C
5kΩ, +125°C
10kΩ, –40°C
10kΩ, +25°C
10kΩ, +125°C
80kΩ, –40°C
80kΩ, +25°C
80kΩ, +125°C
CODE (Decimal)
R-INL (LSB)
09654-008
Figure 7. R-INL vs. Code (AD5113)
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 31
10kΩ, –40°C
10kΩ, +25°C
10kΩ, +125°C
80kΩ, –40°C
80kΩ, +25°C
80kΩ, +125°C
CODE (Decimal)
R-INL (LSB)
09654-009
Figure 8. R-INL vs. Code (AD5115)
–0.07
–0.06
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
0
7
14
21
28
35
42
49
56
63
70
77
84
91
98
105
112
119
127
10kΩ, –40°C 10kΩ, +25°C 10kΩ, +125°C
80kΩ, –40°C 80kΩ, +25°C 80kΩ, +125°C
CODE (Decimal)
09654-010
R-DNL (LSB)
Figure 9. R-DNL vs. Code (AD5111)
0 3
6
9
12
15
18
21 24
27 30 33
36
39 42
45
48 51
54
57
60 63
5kΩ, –40°C
5kΩ, +25°C
5kΩ, +125°C
10kΩ, –40°C
10kΩ, +25°C
10kΩ, +125°C
80kΩ, –40°C 80kΩ, +25°C 80kΩ, +125°C
–0.07
–0.06
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
CODE (Decimal)
09654-011
R-DNL (LSB)
Figure 10. R-DNL vs. Code (AD5113)
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 31
–0.018
–0.016
–0.014
–0.012
–0.010
–0.008
–0.006
–0.004
–0.002
0
0.002
0.004
10kΩ, –40°C
10kΩ, +25°C
10kΩ, +125°C
80kΩ, –40°C
80kΩ, +25°C
80kΩ, +125°C
CODE (Decimal)
R-DNL (LSB)
09654-012
Figure 11. R-DNL vs. Code (AD5115)

AD5111BCPZ80-500R7

Mfr. #:
Manufacturer:
Description:
Digital Potentiometer ICs SGL CH128-Position I2C
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