ISL24212IRTZ Datasheet ISL24212IRTZ | P7-P9

ISL24212

FN7590.0

March 15, 2011

The maximum value of I

DVR_OUT

can be calculated by

substituting the maximum register value of 255 into Equation 2,

resulting in Equation 3:

Equation 2 can also be used to calculate the unit sink current

step size per Register Code, resulting in Equation 4:

Determination of R

SET

The ultimate goal for the ISL24212 is to generate an adjustable

voltage between two endpoints, V

COM_MIN

and V

COM_MAX

, with

a fixed power supply voltage, AV

. This is accomplished by

choosing the correct values for R

SET

, R

and R

. The exact value

of R

SET

is not critical. Values from 1k to more than 100k will

work under most conditions. Equation 5 calculates the minimum

SET

value:

Note that this is the absolute minimum value for R

SET

. Larger

SET

values reduce quiescent power, since R

and R

are

proportional to R

SET

. The ISL24212 is tested with a 5kΩ R

SET

Determination of R

and R

With AV

, V

COM(MIN)

and V

COM(MAX)

known and R

SET

chosen

per the above requirements, R

and R

can be determined using

Equations 6 and 7:

Final Transfer Function

The voltage at the DVR_OUT pin can be calculated from

Equation 8:

With amplifier A2 in the unity-gain configuration (V

COM_OUT

tied

to IN

as shown in Figure 5), V

DVROUT

COM_OUT

COM

Example

As an example, suppose the A

VDD

supply is 15V, the desired

COM_MIN

= 6.5V and the desired V

COM_MAX

= 8.5V. R

SET

arbitrarily chosen to be 7.5k

Ω.

First, verify that our chosen R

SET

meets the minimum

requirement described in Equation 5:

Using Equations 6 and 7, calculate the values of R

and R

Table 1 shows the resulting V

COM

voltage as a function of register

value for these conditions.

Output Voltage Span Calculation

It is also possible to calculate V

COM(MIN)

and V

COM(MAX)

from the

existing resistor values.

COM_MIN

occurs when the greatest current, I

DVR(MAX),

is drawn

from the middle node of the R1/R2 divider. Substituting

RegisterValue = 255 into Equation 8 gives the following:

Similarly, RegisterValue = 0 for V

COM(MAX)

DVROUT

MAX()

VDD

20R

SET

--------------------

(EQ. 3)

STEP

256()20()R

SET

()

----------------------------------------------

(EQ. 4)

SET

MIN()

--------------

OUT MIN()

--------------

–

⎝⎠

⎛⎞

------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

kΩ()=

(EQ. 5)

5120 R

SET

COM MAX()

COM MIN()

–

256 V

COM MAX()

⋅ V

COM MIN()

–

---------------------------------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

⋅=

(EQ. 6)

5120 R

SET

COM MAX()

COM MIN()

–

255 AV

⋅ V

COM MIN()

256 V

COM MAX()

⋅–+

---------------------------------------------------------------------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

⋅=

(EQ. 7)

DVROUT

--------------------

⎝⎠

⎜⎟

⎛⎞

RegisterValue 1+

256

---------------------------------------------------

20R

SET

--------------------

⎝⎠

⎜⎟

⎛⎞

–

⎝⎠

⎜⎟

⎛⎞

(EQ. 8)

TABLE 1. EXAMPLE V

DVR_OUT

vs REGISTER VALUE

DVR_OUT

(V)

08.49

20 8.34

40 8.18

60 8.02

80 7.87

100 7.71

120 7.55

127 7.50

140 7.40

160 7.24

180 7.09

200 6.93

220 6.77

240 6.62

255 6.50

7.5kΩ()R

SET

MIN()

------ -

6.5V

------ -

–

⎝⎠

⎛⎞

------------------------------

⎝⎠

⎜⎟

⎛⎞

0.163kΩ==

⎝⎠

⎜⎟

⎛⎞

(EQ. 9)

5120 7500

8.5 6.5–

256 8.5⋅ 6.5–

------------------------------------- -

⎝⎠

⎛⎞

⋅⋅ 35.4kΩ==

(EQ. 10)

5120 7500

8.5 6.5–

255 15⋅ 6.5 256 8.5⋅–+

------------------------------------------------------------------

⎝⎠

⎛⎞

⋅⋅ 46.4kΩ==

(EQ. 11)

COM MIN()

--------------------

⎝⎠

⎜⎟

⎛⎞

20R

SET

--------------------

⎝⎠

⎜⎟

⎛⎞

–

⎝⎠

⎜⎟

⎛⎞

(EQ. 12)

COM MAX()

--------------------

⎝⎠

⎜⎟

⎛⎞

256

----------

20R

SET

--------------------

⎝⎠

⎜⎟

⎛⎞

–

⎝⎠

⎜⎟

⎛⎞

(EQ. 13)

ISL24212

FN7590.0

March 15, 2011

By finding the difference of Equation 13 and Equation 12, the total

span of V

COM

can be found:

Assuming that the I

DVROUT

(MIN) = 0 instead of I

STEP

, the

expression in Equation 14 simplifies to:

DVR_OUT Pin Leakage Current

When the voltage on the DVR_OUT pin is greater than 10V, an

additional leakage current flows into the pin in addition to the

SET

current. Figure 6 shows the I

SET

current and the DVR_OUT

pin current for DVR_OUT pin voltage up to 19V. In applications

where the voltage on the DVR_OUT pin will be greater than 10V,

the actual output voltage will be lower than the voltage

calculated by Equation 8 due to this extra current. The graph in

Figure 6 was measured with R

SET

= 4.99kΩ.

Power Supply Sequence

The recommended power supply sequencing is shown in

Figure 7. When applying power, V

should be applied before or

at the same time as AV

. The minimum time for t

is 0µs.

When removing power, the sequence of V

and AV

is not

important.

Do not remove V

or AV

within 100ms of the start of the

EEPROM programming cycle. Removing power before the

EEPROM programming cycle is completed, may result in

corrupted data in the EEPROM.

Operating and Programming

Supply Voltage and Current

To program the EEPROM, AV

must be ≥10.8V. If further

programming is not required, the ISL24212 will operate over an

range of 4.5V to 19V.

During EEPROM programming, I

and I

AVDD

will temporarily be

4-5x higher for up to 100ms (t

PROG

Up/Down Counter Interface

The ISL24212 allows the adjustment of the output V

COM

voltage

and the programming of the non-volatile memory through a

single pin (CTL) when the CE (counter enable) pin is high. The CTL

pin is biased so that its voltage is set to VDD/2 if the driving

circuit is set to Tristate or High Impedance (Hi-Z), allowing

up/down operation using common digital I/O logic.

CTL Pin

When a mid-high-mid transition is detected on the CTL pin (see

Figure 11), the internal register value counts down by one at the

trailing (high-mid) edge, and the output V

COM

voltage is

increased according to Equation 8. Similarly, when a mid-low-mid

transition is detected on the CTL pin, the internal register value

counts up by one at the trailing (low-mid) edge, and the output

COM

voltage is decreased. Once the maximum or minimum

value is reached, the counter saturates and will not overflow or

underflow beyond those values.

CTL should have a noise filter to reduce bouncing or noise on the

input that could cause unwanted counts when the CE pin is high.

Figure 8 shows a simple debouncing circuit consisting of a series

1kΩ resistor and a shunt 0.01µF capacitor connected on the CTL

pin. To avoid unintentional adjustment, the ISL24212 guarantees

to reject CTL pulses shorter than 20µs.

This pin is pulled above 4.9V to program the EEPROM. See

“Programming the EEPROM” on page 9 for details.

After CE (Counter Enable) is asserted and after programming

EEPROM, the very first CTL pulse is ignored (see Figure 11) to

avoid the possibility of a false count (CTL state may be unknown

after programming).

COM

SPAN AV

--------------------

⎝⎠

⎜⎟

⎛⎞

256

----------

–

⎝⎠

⎛⎞

20R

SET

--------------------

⎝⎠

⎜⎟

⎛⎞

(EQ. 14)

COM

SPAN

R⋅

--------------------

⎝⎠

⎜⎟

⎛⎞

20R

SET

--------------------

⎝⎠

⎜⎟

⎛⎞

R⋅

--------------------

⎝⎠

⎜⎟

⎛⎞

DVROUT

MAX()==

(EQ. 15)

FIGURE 6. DVR_OUT PIN LEAKAGE CURRENT

02468101214161820

OUT PIN VOLTAGE (V)

CURRENT (mA)

0.00

0.05

0.10

0.15

0.20

0.25

0.30

OUT PIN CURRENT

SET PIN CURRENT

VDD

FIGURE 7. POWER SUPPLY SEQUENCE

FIGURE 8. EXTERNAL DEBOUNCER ON CTL PIN

ISL24212

CTL

0.01µF

1kΩ

CLOSE TO

EEPROM

PROGRAM

ISL24212

FN7590.0

March 15, 2011

CE Pin

To change the counter controlling the output voltage, the CE

(Counter Enable) pin must be pulled high (V

). When the CE pin

is pulled low, the counter value is loaded from EEPROM, which

takes 10ms (during which the inputs should remain constant).

The CE pin has an internal pull-down to keep it at a logic low

when not being driven. CE should be pulled low before powering

the device down to ensure that any glitches or transients during

power-down will not cause unwanted EEPROM overwriting.

The CE pin has a Schmitt trigger on the input to prevent false

triggering during slow transitions of the CE pin. The CE pin

transition time should be 10µs or less.

Programming the EEPROM

To program the non-volatile EEPROM, pull the CTL pin above 4.9V

for more than 200µs. The level and timing is shown in Figure 9. It

then takes a maximum of 100ms after CTL crosses 4.9V for the

programming to be completed inside the device.

When the part is programmed, the data in the counter register is

written into the EEPROM. This value will be loaded from the

EEPROM during subsequent power-ups as well as when the CE

pin is pulled low. The ISL24212 is factory-programmed to

mid-scale. As with asserting CE, the first pulse after a program

operation is ignored. The EEPROM contents can be written and

verified using the following steps:

1. Power-up the ISL24212. The EEPROM value will be loaded.

2. Set the CE pin to V

3. Change the V

OUT

voltage using the CTL pin to the desired

value, noting that first pulse will be ignored.

4. Pull the CTL pin to 4.9V or higher for at least 200µs. The

counter value will be written to EEPROM after 100ms.

5. Change the V

OUT

value (using the CTL pin) to a different value,

noting that first pulse after programming will be ignored.

6. Set the CE pin to 0V. The stored output value will be loaded

from EEPROM after 10ms.

7. Verify that the output value is the same value programmed in

Step 4.

The CTL pin should be left floating after programming. The

voltage at the CTL pin will be internally biased to V

/2 to ensure

that no additional pulses will be seen by the Up/Down counter. To

prevent further changes, ground the CE pin.

Typical Application Circuit

Shown below in Figure 10 is a typical circuit that can be used to

program the ISL24212 via the up/down counter interface. Three

momentary push-button switches are required. SW1 connected

between CTL and AV

allows the user to bring CTL above V

for

programming the EEPROM, SW2 connected to V

to pull CTL up,

and SW3 connected to GND to pull CTL to down. All the switches

should have 1k

Ω current-limiting resistors in series.

For adjustment and programming to occur, the CE pin has to be

set to V

. This can be achieved by a single-pull double-throw

switch (SW4) connected between V

and GND.

Note that pressing the UP button increments the counter, but

results in V

COM_OUT

decreasing. Similarly, pressing the DOWN

button decrements the counter, and results in V

COM_OUT

increasing.

CTL VOLTAGE

TIME

4.9V

PROG

FIGURE 9. EEPROM PROGRAMMING

>200µs

100ms

EEPROM

OPERATION

COMPLETE

FIGURE 10. TYPICAL APPLICATION CIRCUIT

ISL24212

CTL

0.01µF

CLOSE TO

PROGRAM

1kΩ

DOWN

1kΩ

EEPROM

DVR_OUT

SET

RSET

VCOM_OUT

COM

to LCD Panel

SW2

SW1

SW3

SW4

GND

0.01µF

0.1µF

ENABLE

ADJUST /

PROGRAM

DISABLE

P1-P3 P4-P6 P7-P9 P10-P12

ISL24212IRTZ

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Description:

LCD Gamma Buffers ISL24212IRTZ VCOM DR VR + CLBTR UP/DN

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