7
LTC1159
LTC1159-3.3/LTC1159-5
increases, the output voltage decreases slightly. This causes
the output of the gain stage to increase the current com-
parator threshold, thus tracking the load current.
The sequence of events for Burst Mode operation is very
similar to continuous operation with the cycle interrupted
by the voltage comparator. When the output voltage is at or
above the desired regulated value, the P-channel MOSFET
is held off by comparator V and the timing capacitor con-
tinues to discharge below V
TH1
. When the timing capacitor
discharges past V
TH2
, voltage comparator S trips, causing
the internal SLEEP line to go low and the N-channel MOSFET
to turn off.
The circuit now enters sleep mode with both power
MOSFETs turned off. In sleep mode, much of the circuitry
(Refer to Functional Diagram)
OPERATIO
U
is turned off, dropping the supply current from several
milliamps (with the MOSFETs switching) to 300µA. When
the output capacitor has discharged by the amount of
hysteresis in comparator V, the P-channel MOSFET is
again turned on and this process repeats. To avoid the
operation of the current loop interfering with Burst Mode
operation, a built-in offset is incorporated in the gain stage.
To prevent both the external MOSFETs from being turned
on at the same time, feedback is incorporated to sense the
state of the driver output pins. Before the N-gate output can
go high, the P-drive output must also be high. Likewise, the
P-drive output is prevented from going low when the
N-gate output is high.
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The LTC1159 Compared to the LTC1148/LTC1149
Families
The LTC1159 family is closest in operation to the LTC1149
and shares much of the applications information. In addi-
tion to reduced quiescent and shutdown currents, the
LTC1159 adds an internal switch which allows the driver
and control sections to be powered from an external
source for higher efficiency. This change affects Power
MOSFET Selection, EXTV
CC
Pin Connection, Important
Information About LTC1159 Adjustable Applications, and
Efficiency Considerations found in this section.
The basic LTC1159 application circuit shown in Figure 1
is limited to a maximum input voltage of 30V due to
MOSFET breakdown. If the application does not require
greater than 18V operation, then the LTC1148 or
LTC1148HV should be used. For higher input voltages
where quiescent and shutdown current are not critical, the
LTC1149 may be a better choice since it is set up to drive
standard threshold MOSFETs.
R
SENSE
Selection for Output Current
R
SENSE
is chosen based on the required output current. The
LTC1159 current comparator has a threshold range that
extends from a minimum of 0.025V/R
SENSE
to a maximum
of 0.15V/R
SENSE
. The current comparator threshold sets
the peak of the inductor ripple current, yielding a maximum
output current I
MAX
equal to the peak value less half the
peak-to-peak ripple current.
For proper Burst Mode opera-
tion, I
RIPPLE(P-P)
must be less than or equal to the minimum
current comparator threshold.
Since efficiency generally increases with ripple current,
the maximum allowable ripple current is assumed, i.e.,
I
RIPPLE(P-P)
= 0.025V/R
SENSE
(see C
T
and L Selection for
Operating Frequency). Solving for R
SENSE
and allowing
a margin for variations in the LTC1159 and external
component values yields:
R
SENSE
= m
100
I
MAX
A graph for selecting R
SENSE
versus maximum output
current is given in Figure 2. The LTC1159 series works well
with values of R
SENSE
from 0.02 to 0.2.
The load current below which Burst Mode operation com-
mences, I
BURST
, and the peak short-circuit current, I
SC(PK)
,
both track I
MAX
. Once R
SENSE
has been chosen, I
BURST
and
I
SC(PK)
can be predicted from the following equations:
8
LTC1159
LTC1159-3.3/LTC1159-5
MAXIMUM OUTPUT CURRENT (A)
0
R
SENSE
()
0.12
0.16
0.20
4
LTC1159 • F02
0.08
0.04
0
1
2
3
5
0.10
0.14
0.18
0.06
0.02
Figure 2. R
SENSE
vs Maximum Output Current
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I
BURST
15mV
R
SENSE
I
SC(PK)
=
150mV
R
SENSE
The LTC1159 automatically extends t
OFF
during a short
circuit to allow sufficient time for the inductor current to
decay between switch cycles. The resulting ripple current
causes the average short-circuit current I
SC(AVG)
to be
reduced to approximately I
MAX
.
L and C
T
Selection for Operating Frequency
The LTC1159 uses a constant off-time architecture with
t
OFF
determined by an external timing capacitor C
T
. The
value of C
T
is calculated from the desired continuous mode
operating frequency, f:
C
T
=
7.8 • 10
–5
f
)
)
1 –
V
OUT
V
IN
A graph for selecting C
T
versus frequency including the
effects of input voltage is given in Figure 3.
As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The complete expression for operating
frequency is given by:
f =
1
t
OFF
)
)
1 –
V
OUT
V
IN
where t
OFF
= 1.3 • 10
4
• C
T
Once the frequency has been set by C
T
, the inductor L
must be chosen to provide no more than 0.025V/R
SENSE
of peak-to-peak inductor ripple current. This results in a
minimum required inductor value of:
L
MIN
= 5.1 • 10
5
• R
SENSE
• C
T
• V
REG
As the inductor value is increased from the minimum value,
the ESR requirements for the output capacitor are eased at
the expense of efficiency. If too small an inductor is used,
the LTC1159 may not enter Burst Mode operation and
efficiency will be severely degraded at low currents.
Inductor Core Selection
Once the minimum value for L is known, the type of
inductor must be selected. High efficiency converters
generally cannot afford the core loss found in low cost
powdered iron cores, forcing the use of more expensive
ferrite, molypermalloy or Kool Mµ
®
cores. Actual core loss
is independent of core size for a fixed inductor value, but
it is very dependent on the inductance selected. As induc
-
tance increases, core losses go down but copper (I
2
R)
losses will increase.
Ferrite designs have very low core loss, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
FREQUENCY (kHz)
0
0
C
T
CAPACITANCE (pF)
200
400
600
1400
1000
50
100
1200
800
150
200
250
V
OUT
= 5V
V
IN
= 48V
V
IN
= 12V
V
IN
= 24V
LTC1159 • F03
Figure 3. Timing Capacitor Selection
Kool Mµ is a registered trademark of Magnetics, Inc.
9
LTC1159
LTC1159-3.3/LTC1159-5
inductor ripple current and consequent output voltage
ripple which can cause Burst Mode operation to be falsely
triggered in the LTC1159. Do not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a low loss core
material for toroids, but it is more expensive than ferrite.
A reasonable compromise from the same manufacturer is
Kool Mµ. Toroids are very space efficient, especially when
you can use several layers of wire. Because they generally
lack a bobbin, mounting is more difficult. However, new
surface mount designs available from Coiltronics do not
increase the height significantly.
Power MOSFET Selection
Two external power MOSFETs must be selected for use
with the LTC1159: a P-channel MOSFET for the main
switch and an N-channel MOSFET for the synchronous
switch.
The peak-to-peak drive levels are set by the V
CC
voltage on
the LTC1159. This voltage is typically 4.5V during start-up
and 5V to 7V during normal operation (see EXTV
CC
Pin
Connection). Consequently,
logic-level threshold
MOSFETs must be used in most LTC1159 family applica-
tions
. The only exception is applications in which EXTV
CC
is powered from an external supply greater than 8V, in
which standard threshold MOSFETs (V
GS(TH)
< 4V) may be
used. Pay close attention to the BV
DSS
specification for the
MOSFETs as well; many of the logic-level MOSFETs are
limited to 30V.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, reverse transfer capacitance C
RSS
,
input voltage and maximum output current. When the
LTC1159 is operating in continuous mode, the duty cycle
for the P-channel MOSFET is given by:
P-Ch Duty Cycle =
V
OUT
V
IN
N-Ch Duty Cycle =
V
IN
V
OUT
V
IN
The MOSFET dissipations at maximum output current are
given by:
N-Ch P
D
=
V
IN
V
OUT
V
IN
(I
MAX
)
2
(1 +
N
) R
DS(ON)
P-Ch P
D
=
V
OUT
V
IN
(I
MAX
)
2
(1 +
P
) R
DS(ON)
+
k(V
IN
)
2
(I
MAX
) (C
RSS
) (f)
where is the temperature dependency of R
DS(ON)
and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the P-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V the
high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device with lower C
RSS
actually provides higher effi-
ciency. The N-channel MOSFET losses are the greatest at
high input voltage or during a short circuit when the
N-channel duty cycle is nearly 100%.
The term (1 + ) is generally given for a MOSFET in the form
of a normalized R
DS(ON)
vs Temperature curve, but
= 0.007/°C can be used as an approximation for low
voltage MOSFETs. C
RSS
is usually specified in the MOSFET
electrical characteristics. The constant k = 5 can be used for
the LTC1159 to estimate the relative contributions of the
two terms in the P-channel dissipation equation.
The Schottky diode D1 shown in Figure 1 only conducts
during the dead time between the conduction of the two
power MOSFETs. D1 prevents the body diode of the
N-channel MOSFET from turning on and storing charge
during the dead time, which could cost as much as 1% in
efficiency (although there are no other harmful effects if
D1 is omitted). Therefore, D1 should be selected for a
forward voltage of less than 0.6V when conducting I
MAX
.
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LTC1159CS-5#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 5V High Eff Syn Stepdn Sw Reg
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