LTC1840IGN#TRPBF

LTC1840
10
1840f
if the BLAST pin is high. If neither blasts nor an active serial
interface watchdog timer are desired, this pin should be
tied to ground. If timer operation is desired without having
a blast occur at power-up, the pin should be pulled above
1V after the part’s supply has ramped up. The blast state
is cleared by writing to the fault register.
Current Output DAC Interface to Switching Regulator
The output of a current DAC is used to control the output
voltage of a switching regulator that powers a fan, which
determines the rotational speed of the fan. The resistor
divider from the output of the regulator to the feedback pin
to ground should be ratioed to give the minimum desired
voltage from the fan, which corresponds to the minimum
fan speed. The size of the resistor from the output to the
feedback pin is then chosen by dividing the difference
between the maximum and minimum desired fan voltages
by the nominal maximum current output of the DAC, which
is 100µA. The value of the resistor from the feedback pin
to ground is then derived from the divider ratio and the
resistor value just calculated.
For example, if the feedback pin of the regulator is at 1.25V
with respect to ground and the minimum desired fan
voltage is 5V, the top resistor in the divider should be
(5V – 1.25V)/1.25V = 3 times larger than the resistor from
the feedback node to ground. If the maximum desired fan
voltage is 12V, the top resistor value is then (12V – 5V)/
100µA = 69.8k, and the bottom resistor is 69.8k/3 = 23.2k.
See Figure 1.
If the feedback pin voltage of a regulator is lower than the
1.1V compliance voltage of either of the LTC1840’s cur-
rent output DACs, the resistor from the regulator output to
the feedback pin can be divided into two resistors, giving
the DAC more room to operate. See Figure 2.
If more than one fan is controlled by one regulator output,
small differences in the actual rotational speeds of the fans
may result in audible beat frequencies, which can be very
annoying. To avoid this problem, the actual voltages
applied to the fans can be varied by adding resistors or
diodes in series with some of the fans, resulting in larger
differences between their rotational speeds and less
noticeable beating. See Figure 3.
GPIO Operation
The GPIO circuits feature N-channel MOSFET open drain
pull-downs that can drive LEDs and readback circuitry to
allow the logic states of the GPIO pins to be accessed
through the serial interface. The circuits that read the logic
states of the pins have standard CMOS thresholds. The
user must take care to minimize the power dissipation in
the pull-downs. LEDs should have series resistors added
to limit current and to limit the voltage drop across the
internal pull-down if their forward drop is less than about
V
CC
minus 0.7V. The N-channel MOSFET pull-downs can
sink 10mA at 0.7V drop to drive LEDs. A series resistor is
usually required to limit LED current and the LTC1840
internal power dissipation. See Table 3 for resistor values.
Table 3. Recommended LED Resistor Values
Recommended
LED Current (mA) Series Resistor ()
V
CC
= 3V V
CC
= 5V
11k3k
3 270 910
5 120 510
10 30 240
Note: LED forward voltage drop assumed to be 2V.
FAULT Operation
Normally, the FAULT pin internal pull-down is only en-
abled if one of the fault bits in the fault register is high. But
it is also enabled if the part is shut down by the POR block
due to low V
CC
supply. This POR fault does not have a
corresponding fault register bit.
BLAST and Serial Interface Watchdog Timer
Operation
The BLAST pin is used to force the DAC output currents to
full value instantaneously and also to gate the operation of
the serial interface watchdog timer. A blast will occur if the
BLAST pin is high when the part comes out of POR or if
there is a high to low transition on BLAST after POR. The
threshold of the BLAST pin is about 1V, independent of
V
CC
. The serial interface watchdog timer, which will signal
a fault condition if the part has not been addressed via the
serial interface for about a minute and a half, is only active
OPERATIO
U
LTC1840
11
1840f
GN16 (SSOP) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
12
3
4
5
6
7
8
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
16
15
14
13
0.189 – 0.196*
(4.801 – 4.978)
12 11 10
9
0.016 – 0.050
(0.406 – 1.270)
0.015
± 0.004
(0.38 ± 0.10)
× 45°
0° – 8° TYP
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
0.004 – 0.0098
(0.102 – 0.249)
0.0250
(0.635)
BSC
0.009
(0.229)
REF
PACKAGE DESCRIPTIO
U
OPERATIO
U
Figure 1. Feedback Divider for 1.25V Reference
Figure 3. Series Diode to Avoid Beat Frequencies
Figure 2. Feedback Divider for 0.8V Reference
V
OUT
(5V TO 12V)
R1
69.8k
R2
23.2k
V
FB
1.25V
I
DAC
REGULATOR
FB
15(14)
I
DACOUTA
(I
DACOUTB
)
LTC1840*
1840 F01
*ADDITIONAL DETAILS
OMITTED FOR CLARITY
V
OUT
(5V TO 12V)
R3
69.8k
R1
10k
R2
15k
V
FB
0.8V
1.3V
I
DAC
REGULATOR
FB
15(14)
I
DACOUTA
(I
DACOUTB
)
LTC1840*
1840 F02
*ADDITIONAL DETAILS
OMITTED FOR CLARITY
V
OUT
BYS10-25
FAN 1 FAN 2
FAN 1, FAN 2: NMB 6820PL-04W-B49-D50
1840 F03
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1840
12
1840f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2001
LT/TP 0402 2K • PRINTED IN USA
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16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
LTC1840
1
2
3
4
5
6
7
8
EXTV
CC
SYNC
RUN/SS
FCB
I
TH
SGND
V
OSENSE
V
PROG
V
IN
TK
SW
TG
B00ST
INTV
CC
BG
PGND
1
2
3
4
5
6
7
8
10k
10k
130
LED1
NC
NC
TO AUTOMATICALLY MUX TACHB BETWEEN THE
TWO PARALLEL FANS, SET GPIO2 TO BLINK
ADDRESS = 1110010
(8 OTHERS POSSIBLE)
L1 = SUMIDA CDRH125-15OMC
C
IN
, C
OUT
, = PANASONIC EEV-FC1C471P
R1, R2 = 1% METAL FILM
LTC1625
+
+
+
C
IN1
470µF
C
IN2
470µF
4.7k
+
CC1
470pF
CF1
100pF
CC2
220pF
CB, 0.22µF
10k
CV
CC
4.7µF
CV
IN
0.1µF
Si4410DY
Si4410DY
L1
15µH
MBRS140T3
+
R1
75k
R2
27k
C
OUT1
470µF
×2
3.3V
3.3V
3.3V
3.3V
SCL
SDA
A1
A0
FAULT
GPIO1
GPIO2
GND
V
CC
I
DACOUTA
I
DACOUTB
BLAST
TACHB
TACHA
GPIO4
GPIO3
DC
FAN
DC
FAN
1840 TA03
CMDSH-3
SYSTEM
RESET
LTC1840
TACH
OUT
TACH
OUT
BYS10-25
EXTV
CC
SYNC
RUN/SS
FCB
I
TH
SGND
V
OSENSE
V
PROG
V
IN
TK
SW
TG
B00ST
INTV
CC
BG
PGND
1
2
3
4
5
6
7
8
LTC1625
+ +
C
IN1B
470µF
C
IN2B
470µF
4.7k
+
CC1B
470pF
CF1B
100pF
CC2B
220pF
CBB, 0.22µF
10k
CV
CCB
4.7µF
CV
INB
0.1µF
Si4410DY
Si4410DY
L1B
15µH
MBRS140T3
+
R1B
75k
R2B
27k
C
OUT1B
470µF
×2
DC
FAN
DC
FAN
CMDSH-3
TACH
OUT
TACH
OUT
10k
10k 10k
IN4148
10k
12V
2- NMB 5910PL-04W-B59-D50 FANS
2.1A NOM AT 12V
2- NMB 5920PL-04W-B29-D50 FANS
2.2A NOM AT 12V
(4.5V TO 12V)
(4.5V TO 12V)
TP0101TS
TN0205A
SDA
SCL
FAULT
-A-
-A-
0.1µF
10µF
Controlling Fan Pair with Automatic Blast Redundancy
and Fan Pair with Automatic Tach Muxing

LTC1840IGN#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Digital to Analog Converters - DAC Dual I2C Fan Speed Controller
Lifecycle:
New from this manufacturer.
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