R8C/2E Group, R8C/2F Group 2. Central Processing Unit (CPU)
Rev.1.00 Dec 14, 2007 Page 14 of 39
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2.8.7 Interrupt Enable Flag (I)
The I flag enables maskable interrupts.
Interrupt are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0
when an interrupt request is acknowledged.
2.8.8 Stack Pointer Select Flag (U)
ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software
interrupt numbers 0 to 31 is executed.
2.8.9 Processor Interrupt Priority Level (IPL)
IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has higher priority than IPL, the interrupt is enabled.
2.8.10 Reserved Bit
If necessary, set to 0. When read, the content is undefined.
R8C/2E Group, R8C/2F Group 3. Memory
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3. Memory
3.1 R8C/2E Group
Figure 3.1 is a Memory Map of R8C/2E Group. The R8C/2E group has 1 Mbyte of address space from addresses
00000h to FFFFFh.
The internal ROM is allocated lower addresses, beginning with address 0FFFFh. For example, a 16-Kbyte internal
ROM area is allocated addresses 0C000h to 0FFFFh.
The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each
interrupt routine.
The internal RAM is allocated higher addresses beginning with address 00400h. For example, a 1-Kbyte internal
RAM area is allocated addresses 00400h to 007FFh. The internal RAM is used not only for storing data but also for
calling subroutines and as stacks when interrupt requests are acknowledged.
Special function registers (SFRs) are allocated addresses 00000h to 002FFh. The peripheral function control
registers are allocated here. All addresses within the SFR, which have nothing allocated are reserved for future use
and cannot be accessed by users.
Figure 3.1 Memory Map of R8C/2E Group
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer/oscillation stop detection/voltage monitor 2
(Reserved)
(Reserved)
Reset
00400h
002FFh
00000h
Internal RAM
SFR
(Refer to 4. Special
Function Registers
(SFRs))
0FFFFh
0FFDCh
NOTE:
1. The blank regions are reserved. Do not access locations in these regions.
FFFFFh
0FFFFh
0YYYYh
Internal ROM
(program ROM)
0XXXh
Part Number
Internal ROM Internal RAM
Size Size
R5F212E2NFP, R5F212E2DFP,
R5F212E2NXXXFP, R5F212E2DXXXFP
R5F212E4NFP, R5F212E4DFP,
R5F212E4NXXXFP, R5F212E4DXXXFP
8 Kbytes
16 Kbytes
0E000h
0C000h
512 bytes
1 Kbyte
005FFh
007FFh
Address 0YYYYh Address 0XXXXh
R8C/2E Group, R8C/2F Group 3. Memory
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3.2 R8C/2F Group
Figure 3.2 is a Memory Map of R8C/2F Group. The R8C/2F group has 1 Mbyte of address space from addresses
00000h to FFFFFh.
The internal ROM (program ROM) is allocated lower addresses, beginning with address 0FFFFh. For example, a
16-Kbyte internal ROM area is allocated addresses 0C000h to 0FFFFh.
The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each
interrupt routine.
The internal ROM (data flash) is allocated addresses 02400h to 02BFFh.
The internal RAM area is allocated higher addresses, beginning with address 00400h. For example, a 1-Kbyte
internal RAM is allocated addresses 00400h to 007FFh. The internal RAM is used not only for storing data but also
for calling subroutines and as stacks when interrupt requests are acknowledged.
Special function registers (SFRs) are allocated addresses 00000h to 002FFh. The peripheral function control
registers are allocated here. All addresses within the SFR, which have nothing allocated are reserved for future use
and cannot be accessed by users.
Figure 3.2 Memory Map of R8C/2F Group
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer/oscillation stop detection/voltage monitor 2
(Reserved)
(Reserved)
Reset
FFFFFh
0FFFFh
0YYYYh
00400h
002FFh
00000h
Internal ROM
(program ROM)
Internal RAM
SFR
(Refer to 4. Special
Function Registers
(SFRs))
0FFFFh
0FFDCh
Internal ROM
(data flash)
(1)
NOTES:
1. Data flash block A (1 Kbyte) and B (1 Kbyte) are shown.
2. The blank regions are reserved. Do not access locations in these regions.
0XXXXh
02400h
02BFFh
Part Number
Internal ROM Internal RAM
Size Size
R5F212F2NFP, R5F212F2DFP,
R5F212F2NXXXFP, R5F212F2DXXXFP
R5F212F4NFP, R5F212F4DFP,
R5F212F4NXXXFP, R5F212F4DXXXFP
8 Kbytes
16 Kbytes
0E000h
0C000h
512 bytes
1 Kbyte
005FFh
007FFh
Address 0YYYYh Address 0XXXXh

R5F212F4NFP#U0

Mfr. #:
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU MCU 2.7/5V 16+2KB 32-LQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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