IRFR/U3504PbF
www.irf.com 7
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
jmax
. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
D (ave)
= Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
av
= Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as 25°C in Figure 15, 16).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see figure 11)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) = DT/ Z
thJC
I
av
=
2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
10000
A
v
a
l
a
n
c
h
e
C
u
r
r
e
n
t
(
A
)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming
Tj = 25°C due to
avalanche losses
0.01
25 50 75 100 125 150 175
Starting T
J
, Junction Temperature (°C)
0
50
100
150
200
250
E
A
R
,
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
TOP Single Pulse
BOTTOM 10% Duty Cycle
I
D
= 30A
IRFR/U3504PbF
8 www.irf.com
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
* V
GS
= 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
R
G
V
DD
dv/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
DS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
IRFR/U3504PbF
www.irf.com 9
D-Pak (TO-252AA) Part Marking Information
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
INTERNATIONAL
AS S EMBLED ON WW 16, 2001
IN THE ASSEMBLY LINE "A"
OR
Note: "P" in assembly line position
EXAMPLE:
LOT CODE 1234
THIS IS AN IRFR120
WI T H AS S EMB L Y
i ndi cates "L ead-F r ee"
PRODUCT (OPTIONAL)
P = DESIGNATES LEAD-FREE
A = AS S E MB L Y S I T E COD E
PART NUMBER
WE E K 1 6
DAT E CODE
YEAR 1 = 2001
RECTIFIER
INTERNATIONAL
LOGO
LOT CODE
AS S E MB L Y
3412
IRFR120
116A
LINE A
34
RECTIFIER
LOGO
IRFR120
12
ASSEMBLY
LOT CODE
YEAR 1 = 2001
DAT E CODE
PART NUMBER
WE E K 16
"P" in as s embly line pos ition indicates
"L ead-F r ee" qual ifi cati on to the cons umer -l evel
P = DESIGNATES LEAD-FREE
PRODUCT QUALIFIED TO T HE
CONSUMER LEVEL (OPTIONAL)
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/

IRFR3504PBF

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
MOSFET N-CH 40V 30A DPAK
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union