7
FN9073.9
October 21, 2015
Functional Description
Initialization
The ISL6406 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors the
the output voltage of the charge pump. During POR, the charge
pump operates on a free running oscillator. Once the POR level
is reached, the charge pump oscillator is synched to the PWM
oscillator. The POR function also initiates the soft-start
operation after the charge pump output voltage exceeds its
POR threshold.
Soft-Start
The POR function initiates the digital soft-start sequence.
The PWM error amplifier reference is clamped to a level
proportional to the soft-start voltage. As the soft-start voltage
slews up, the PWM comparator generates PHASE pulses of
increasing width that charge the output capacitor(s). This
method provides a rapid and controlled output voltage rise.
The soft start sequence typically takes about 6.5ms.
Figure 2 shows the soft-start sequence for a typical
application. At t0, the +3.3V VCC voltage starts to ramp. At
time t1, the Charge Pump begins operation and the +5V
CPVOUT IC bias voltage starts to ramp up. Once the voltage
on CPVOUT crosses the POR threshold at time t2, the
output begins the soft-start sequence. The triangle waveform
from the PWM oscillator is compared to the rising error
amplifier output voltage. As the error amplifier voltage
increases, the pulse-width on the UGATE pin increases to
reach the steady-state duty cycle at time t3.
Frequency Selection
The ISL6406 offers adjustable frequency from 100kHz to
700kHz by changing external resistor connected at pin RT.
Figure 3 shows the typical RT vs Frequency variation curve.
Shoot-Through Protection
A shoot-through condition occurs when both the upper
MOSFET and lower MOSFET are turned on simultaneously,
effectively shorting the input voltage to ground. To protect
the regulator from a shoot-through condition, the ISL6406
incorporates specialized circuitry which insures that the
MOSFETs are not ON simultaneously.
The adaptive shoot-through protection utilized by the
ISL6406 looks at the lower gate drive pin, LGATE, and the
upper gate drive pin, UGATE, to determine whether a
MOSFET is ON or OFF. If the voltage from UGATE or from
LGATE to GND is less than 0.8V, then the respective
MOSFET is defined as being OFF and the other MOSFET is
turned ON. This method of shoot-through protection allows
the regulator to sink or source current.
Since the voltage of the lower MOSFET gate and the upper
MOSFET gate are being measured to determine the state of
the MOSFET, the designer is encouraged to consider the
repercussions of introducing external components between
the gate drivers and their respective MOSFET gates before
actually implementing such measures. Doing so may
interfere with the shoot-through protection.
Output Voltage Selection
The output voltage can be programmed to any level between
V
IN
and the internal reference, 0.8V. An external resistor
divider is used to scale the output voltage relative to the
reference voltage and feed it back to the inverting input of
the error amplifier, see Figure 4. However, since the value of
R
1
affects the values of the rest of the compensation
components, it is advisable to keep its value less than 5k. R
4
can be calculated based on Equation 2:
If the output voltage desired is 0.8V, simply route the output
back to the FB pin through R
1
, but do not populate R
4
.
FIGURE 2. SOFT-START INTERVAL
0V
TIME
t2
t3
t0
CPVOUT (5V)
VCC (3.3V)
V
OUT
(2.50V)
(1V/DIV)
t1
FIGURE 3. RT vs FREQUENCY
20
40
60
80
100
120
140
160
180
200
50 100 150 200 250 300 350 400 450 500 550 600 650 700 750
RT (k
)
FREQUENCY (kHz)
R
4
R
1
0.8V
V
OUT1
0.8V
-------------------------------------------=
(EQ. 2)
ISL6406
8
FN9073.9
October 21, 2015
.
Frequency Synchronization and Enable
The external frequency synchronization and enable
functions are combined in SYNC/EN pin. This pin is TTL
compatible for VCC = 3.3V or 5V. The device is disabled if
the input to this pin is TTL LOW for more than 40µs (typ); it is
enabled if the input is TTL HIGH without delay. When
disabling the IC, the charge pump is turned off and the
BOOT pin is left charged at ~5V. In some cases, this charge
will inadvertently leak through the upper gate driver and can
possibly turn on the upper FET. To avoid this, it is
recommended that a 1M ‘bleed’ resistor be connected from
the BOOT pin to GND. This resistor is shown in the Typical
Application Schematics on page 3 as R
BOOT
.
The SYNC/EN pin is monitored by the internal timer. The
timer allows SYNC pulses (TTL LOW level) to pass through,
as long as the pulses are shorter than 22µs. The minimum
SYNC pulse width is 40ns (typ).
The oscillator can SYNC to an external frequency of
between 1.1x and 2.0x the free-running frequency. Loop
acquisition time is about 200 clock cycles. The timing
resistor (RT) is always required, regardless of whether
SYNC pulses are being used or not.
For instance, if RT is selected such that the switching
frequency is 100kHz then the ISL6406 can be synchronized
to a switching frequency from 110kHz to 200kHz.
Overcurrent Protection
The overcurrent function protects the converter from a
shorted output by using the upper MOSFET ON-resistance,
r
DS(ON)
, to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor. The over current function cycles the
soft-start function in a hiccup mode to provide fault
protection. A resistor (r
OCSET
) programs the over current
trip level (see Typical Application diagrams beginning on
page 3). An internal 20µA (typical) current sink develops a
voltage across r
OCSET
that is referenced to V
IN
. When the
voltage across the upper MOSFET (also referenced to V
IN
)
exceeds the voltage across r
OCSET
, the overcurrent function
initiates a soft-start sequence.
Figure 5 illustrates the protection feature responding to an
overcurrent event. At time t0, an overcurrent condition is
sensed across the upper MOSFET. As a result, the regulator
is quickly shutdown and the internal soft-start function begins
producing soft-start ramps. The delay interval seen by the
output is equivalent to three soft-start cycles. The fourth
internal soft-start cycle initiates a normal soft-start ramp of the
output, at time t1. The output is brought back into regulation
by time t2, as long as the overcurrent event has cleared. Had
the cause of the overcurrent still been present after the delay
interval, the overcurrent condition would be sensed and the
regulator would be shut down again for another delay interval
of three soft-start cycles. The resulting hiccup mode style of
protection would continue to repeat indefinitely.
The overcurrent function will trip at a peak inductor current
(I
peak
) determined by Equation 3:
where I
OCSET
is the internal OCSET current source (20µA
typical). The OC trip point varies mainly due to the MOSFET
r
DS(ON)
variations. To avoid overcurrent tripping in the
FIGURE 4. OUTPUT VOLTAGE SELECTION
+
R1
C
OUT
+3.3V
V
OUT
R4
L
OUT
ISL6406
C4
Q1
FB
UGATE
VCC
BOOT
COMP
D1
R2
C2
C1
R3
C3
PHASE
LGATE
Q2
CPVOUT
VIN
FIGURE 5. OVERCURRENT PROTECTION RESPONSE
0V
TIME
V
OUT
(2.5V)
t1
t0 t2
INTERNAL SOFT-START FUNCTION
DELAY INTERVAL
I
PEAK
I
OCSET
R
OCSET

r
DS ON
--------------------------------------------------------=
(EQ. 3)
ISL6406
9
FN9073.9
October 21, 2015
normal operating load range, find the r
OCSET
resistor from
Equation 3 with:
1. The maximum r
DS(ON)
at the highest junction
temperature.
2. The minimum I
OCSET
from the specification table.
3. Determine I
PEAK
for, I
PEAK
> I
OUT(MAX)
+ (I/2)
where I is the output inductor ripple current.
For an equation for the ripple current see the section under
Component Selection Guidelines titled “Output Inductor
Selection” on page 11. A small ceramic capacitor should be
placed in parallel with r
OCSET
to smooth the voltage across
r
OCSET
in the presence of switching noise on the input
voltage.
When the controller enters hiccup mode the differential
voltage across the error amplifier forces the COMP pin to rail
HIGH to approximately 5V. When the controller begins a new
soft-start sequence out of hiccup mode the COMP pin will
need to discharge down to approximately 1.2V near the
beginning of the PWM ramp in order to start up correctly. To
ensure the controller can discharge the COMP pin fast
enough the R and C from COMP to FB must not have too
high a time constant. For time constant recommendations
refer to the section “Feedback Compensation” on page 10.
Current Sinking
The ISL6406 incorporates a MOSFET shoot-through
protection method which allows a converter to sink current
as well as source current. Care should be exercised when
designing a converter with the ISL6406 when it is known that
the converter may sink current. When the converter is
sinking current, it is behaving as a boost converter that is
regulating its input voltage. This means that the converter is
boosting current into the input rail of the regulator. If there is
nowhere for this current to go, such as to other distributed
loads on the rail or through a voltage limiting protection
device, the capacitance on this rail will absorb the current.
This situation will allow the voltage level of the input rail to
increase. If the voltage level of the rail is boosted to a level
that exceeds the maximum voltage rating of any
components attached to the input rail, then those
components may experience an irreversible failure or
experience stress that may shorten their lifespan. Ensuring
that there is a path for the current to flow other than the
capacitance on the rail will prevent this failure mode.
Application Guidelines
Layout Considerations
Layout is very important in high frequency switching
converter design. With power devices switching, the
resulting current transitions from one device to another
cause voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit,
and lead to device overvoltage stress.
Careful component layout and printed circuit board design
minimizes the voltage spikes in the converters. As an example,
consider the turn-off transition of the PWM MOSFET. Prior to
turn-off, the MOSFET is carrying the full load current. During
turn-off, current stops flowing in the MOSFET and is picked up
by the lower MOSFET. Any parasitic inductance in the switched
current path generates a large voltage spike during the
switching interval. Careful component selection, tight layout of
the critical components, and short wide traces minimizes the
magnitude of voltage spikes.
There are two sets of critical components in a DC/DC
converter using the ISL6406. The switching components are
the most critical because they switch large amounts of
energy, and therefore tend to generate large amounts of
noise. Next, are the small signal components which connect
to sensitive nodes or supply critical bypass current and
signal coupling.
A multi-layer printed circuit board is recommended. Figure 6
shows the connections of the critical components in the
converter. Note that capacitors C
IN
and C
OUT
could each
represent numerous physical capacitors.
V
OUT
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
L
OUT
C
OUT
C
IN
+3.3V V
IN
KEY
COMP
ISL6406
UGATE
R4
R
2
C
BP
FB
GND
CPVOUT
FIGURE 6. PRINTED CIRCUIT BOARD POWER PLANES
AND ISLANDS
R
1
BOOT
C
2
VIA CONNECTION TO GROUND PLANE
LOAD
Q1
C
BOOT
PHASE
D1
R
3
C
3
C
1
Q2
LGATE
PHASE
VCC
C
VCC
ISL6406

ISL6406IBZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers HI EFF LWVAGE SINGLE PWM W/ADJ OUTPUT
Lifecycle:
New from this manufacturer.
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