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light loads, the part will go to sleep between groups of
pulses, so the quiescent current of the part will still be low,
but not as low as in Burst Mode operation. The quiescent
current in a typical application when synchronized with an
external clock is 11µA at no load. Holding the SYNC pin
DC high yields no advantages in terms of output ripple or
minimum load to full frequency, so is not recommended.
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
R1= R2
V
OUT
1.197V
1
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
The total resistance of the FB resistor divider should be
selected to be as large as possible to enhance low current
performance. The resistor divider generates a small load
on the output, which should be minimized to optimize the
low supply current at light loads.
When using large FB resistors, a 10pF phase lead capacitor
should be connected from V
OUT
to FB.
Setting the Switching Frequency
The LT3976 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2MHz
by using a resistor tied from the RT pin to ground. A table
showing the necessary R
T
value for a desired switching
frequency is in Table 1.
To estimate the necessary R
T
value for a desired switching
frequency, use the equation:
R
T
=
51.1
f
SW
( )
1.09
9.27
where R
T
is in kΩ and f
SW
is in MHz.
Table 1. Switching Frequency vs R
T
Value
SWITCHING FREQUENCY (MHz) R
T
VALUE (kΩ)
0.2 294
0.3 182
0.4 130
0.6 78.7
0.8 54.9
1.0 41.2
1.2 32.4
1.4 26.1
1.6 21.5
1.8 17.8
2.0 14.7
2.2 12.4
Operating Frequency Trade-Offs
Selection of the operating frequency is a trade-off between
efficiency, component size, minimum dropout voltage, and
maximum input voltage. The advantage of high frequency
operation is that smaller inductor and capacitor values
may be used. The disadvantages are lower efficiency, and
lower maximum input voltage. The highest acceptable
switching frequency (f
SW(MAX)
) for a given application
can be calculated as follows:
f
SW(MAX)
=
V
OUT
+ V
D
t
ON(MIN)
V
IN
V
SW
+ V
D
( )
where V
IN
is the typical input voltage, V
OUT
is the output
voltage, V
D
is the catch diode drop (~0.5V), and V
SW
is
the internal switch drop (~0.3V at max load). This equa-
tion shows that slower switching frequency is necessary
to safely accommodate high V
IN
/V
OUT
ratio. This is due
to the limitation on the LT3976’s minimum on-time. The
minimum on-time is a strong function of temperature.
Use the typical minimum on-time curve to design for an
application’s maximum temperature, while adding about
30% for part-to-part variation. The minimum duty cycle that
can be achieved taking minimum on time into account is:
DC
MIN
= f
SW
t
ON(MIN)
where f
SW
is the switching frequency, the t
ON(MIN)
is the
minimum switch on-time.
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A good choice of switching frequency should allow ad-
equate input voltage range (see next two sections) and
keep the inductor and capacitor values small.
Maximum Input Voltage Range
The LT3976 can operate from input voltages of up to 40V.
Often the highest allowed V
IN
during normal operation
(V
IN(OP-MAX)
) is limited by the minimum duty cycle rather
than the absolute maximum ratings of the V
IN
pin. It can
be calculated using the following equation:
V
IN(OP-MAX)
=
V
OUT
+
V
D
f
SW
t
ON(MIN)
V
D
+ V
SW
where t
ON(MIN)
is the minimum switch on-time. A lower
switching frequency can be used to extend normal opera-
tion to higher input voltages.
The circuit will tolerate inputs above the maximum op-
erating input voltage and up to the absolute maximum
ratings of the V
IN
and BOOST pins, regardless of chosen
switching frequency. However, during such transients
where V
IN
is higher than V
IN(OP-MAX)
, the LT3976 will enter
pulse-skipping operation where some switching pulses are
skipped to maintain output regulation. The output voltage
ripple and inductor current ripple will be higher than in
typical operation. Do not overload when V
IN
is greater
than V
IN(OP-MAX)
.
During start-up or overload, the switch node slews very
fast due to the 10A peak current limit. At high voltages
during these conditions, an R-C snubber on the switch node
is required to ensure robustness of the LT3976. Typical
values for the snubber areand 470pF. See the Typical
Applications section to see how the snubber is connected.
Minimum Input Voltage Range
The minimum input voltage is determined by either the
LT3976’s minimum operating voltage of 4.3V, its
maximum
duty cycle, or the enforced minimum dropout voltage.
See the Typical Performance Characteristics section for
the minimum input voltage across load for outputs of
3.3V and 5V.
The duty cycle is the fraction of time that the internal
switch is on during a clock cycle. Unlike many fixed fre-
quency regulators, the LT3976 can extend its duty cycle
by remaining on for multiple clock cycles. The LT3976
will not switch off at the end of each clock cycle if there
is sufficient voltage across the boost capacitor (C3 in
the Block Diagram). Eventually, the voltage on the boost
capacitor falls and requires refreshing. When this occurs,
the switch will turn off, allowing the inductor current to
recharge the boost capacitor. This places a limitation on
the maximum duty cycle as follows:
DC
MAX
=
β
SW
β
SW
+1
where β
SW
is equal to the beta of the internal power switch.
The beta of the power switch is typically about 50, which
leads to a DC
MAX
of about 98%. This leads to a minimum
input voltage of approximately:
V
IN(MIN1)
=
V
OUT
+ V
D
DC
MAX
V
D
+ V
SW
where V
OUT
is the output voltage, V
D
is the catch diode
drop, V
SW
is the internal switch drop and DC
MAX
is the
maximum duty cycle.
The final factor affecting the minimum input voltage is
the minimum dropout voltage. When the OUT pin is tied
to the output, the LT3976 regulates the output such that
it stays 500mV below V
IN
. This enforced minimum drop-
out voltage is due to reasons that are covered in the next
section. This places a limitation on the minimum input
voltage as follows:
V
IN(MIN2)
= V
OUT
+ V
DROPOUT(MIN)
where V
OUT
is the programmed output voltage and
V
DROPOUT(MIN)
is the minimum dropout voltage of 500mV.
Combining these factors leads to the overall minimum
input voltage:
V
IN(MIN)
= Max (V
IN(MIN1)
, V
IN(MIN2)
, 4.3V)
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Minimum Dropout Voltage
To achieve a low dropout voltage, the internal power switch
must always be able to fully saturate. This means that the
boost capacitor, which provides a base drive higher than
V
IN
, must always be able to charge up when the part starts
up and then must also stay charged during all operating
conditions.
During start-up if there is insufficient inductor current, such
as during light load situations, the boost capacitor will be
unable to charge. When the LT3976 detects that the boost
capacitor is not charged, it activates a 100mA (typical)
pull-down on the OUT pin. If the OUT pin is connected to
the output, the extra load will increase the inductor current
enough to sufficiently charge the boost capacitor. When
the boost capacitor is charged, the current source turns
off, and the part may re-enter Burst Mode operation.
To keep the boost capacitor charged regardless of load
during dropout conditions, a minimum dropout voltage
is enforced. When the OUT pin is tied to the output, the
LT3976 regulates the output such that:
V
IN
– V
OUT
> V
DROPOUT(MIN)
where V
DROPOUT(MIN)
is 500mV. The 500mV dropout volt-
age limits the duty cycle and forces the switch to turn off
regularly
to charge the boost capacitor. Since sufficient
voltage across the boost capacitor is maintained, the switch
is allowed to fully saturate and the internal switch drop
stays low for good dropout performance. Figure 3 shows
the overall V
IN
to V
OUT
performances during start-up and
dropout conditions.
It is important to note that the 500mV dropout voltage
specified is the minimum difference between V
IN
and
V
OUT
. When measuring V
IN
to V
OUT
with a multimeter,
the measured value will be higher than 500mV because
you have to add half the ripple voltage on the input and
half the ripple voltage on the output. With the normal
ceramic capacitors specified in the data sheet, this mea-
sured dropout voltage can be as high as 650mV at high
load. If some bulk electrolytic capacitance is added to the
input and output the voltage ripple, and subsequently the
measured dropout voltage, can be significantly reduced.
Additionally, when operating in dropout at high currents,
high ripple voltage on the input and output can generate
audible noise. This noise can also be significantly reduced
by adding bulk capacitance to the input and
output to
reduce the voltage ripple.
Inductor Selection and Maximum Output Current
For a given input and output voltage, the inductor value
and switching frequency will determine the ripple current.
The ripple current increases with higher V
IN
or V
OUT
and
decreases with higher inductance and faster switching
frequency. A good first choice for the inductor value is:
L =
V
OUT
+
V
D
2f
SW
where f
SW
is the switching frequency in MHz, V
OUT
is the
output voltage, V
D
is the catch diode drop (~0.5V) and L
is the inductor value is μH.
The inductor’s RMS current rating must be greater than
the maximum load current and its saturation current
should be about 30% higher. For robust operation in fault
conditions (start-up or overload) and high input voltage
(>30V), the saturation current should be above 13A. To
keep the efficiency high, the series resistance (DCR)
should be less than 0.1Ω, and the core material should
be intended for high frequency applications. Table 2 lists
several inductor vendors.
Figure 3. V
IN
to V
OUT
Performance
V
IN
1V/DIV
V
OUT
1V/DIV
V
OUT
V
IN
100ms/DIV1kΩ LOAD
(5mA IN REGULATION)
3976 F03

LT3976EUDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 42V, 5A, 2MHz Step-Down Switching Regulator with 3.4uA Quiescent Current
Lifecycle:
New from this manufacturer.
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