LTC3858-2
10
38582f
FUNCTIONAL DIAGRAM
SW
25, 16
TOP
BOOST
24, 17
TG
26, 15
C
B
C
IN
D
D
B
CLKOUT
PGND
BOT
BG
23, 18
INTV
CC
INTV
CC
V
IN
C
OUT
V
OUT
38582 FD
R
SENSE
DROP
OUT
DET
BOT
TOP ON
S
R
Q
Q
SHDN
SLEEP
0.425V
ICMP
2.7V
0.55V
IR
3mV
SLOPE COMP
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
SENSE
+
32, 10
SENSE
1, 9
PGOOD1
V
FB1
0.88V
0.72V
L
27
21
+
+
+
+
PGOOD2
FREQ
V
FB2
0.88V
0.72V
+
+
+
+
14
+
+
SWITCH
LOGIC
V
FB
31, 11
R
A
C
C
R
C
C
C2
R
B
0.80V
TRACK/SS
0.88V
0.5µA
11V
RUN
7, 8
I
TH
30, 12
SS
29, 13
+
C
SS
1µA
SHDN
CURRENT
LIMIT
FOLDBACK
SHDN
RST
2(V
FB
)
4
PHASMD
3
2
PLLIN/MODE
20µA
VCO
LDO
EN
INTV
CC
5.1V
SYNC
DET
100k
C
LP
CLK2
CLK1
5
I
LIM
28
V
IN
EXTV
CC
20
22
LDO
PFD
EN
4.7V
5.1V
+
19
SGND
6
EA
OV
LTC3858-2
11
38582f
Table 1. Summary of the Differences Between LTC3858, LTC3858-1 and LTC3858-2
LTC3858 LTC3858-1 LTC3858-2
Short-Circuit Latchoff Feature?
Yes, But Can Be Defeated Yes, But Can Be Defeated Not Present
Overvoltage Protection
BG Forced On
(Bottom MOSFET “Crowbar”)
BG Forced On
(Bottom MOSFET “Crowbar”)
BG Not Forced On
(Behavior Depends on Light Load Mode)
Optional Tracking Start-Up?
No No Yes
Independent PGOOD1 and PGOOD2 Pins?
Yes No, PGOOD1 Only Yes
CLKOUT/PHASMD Pins for PolyPhase
Yes No Yes
Adjustable Current Limit (I
LIM
Pin)
Yes No Yes
Package
5mm × 5mm QFN 4mm × 5mm QFN and
Narrow SSOP
5mm × 5mm QFN
OPERATION
(Refer to the Functional Diagram)
Table 1 summarizes the differences between the LTC3858-2
and its sister parts, the LTC3858 and LTC3858-1. The
LTC3858-2 uses a constant frequency, current mode
step-down architecture with the two controller channels
operating 180 degrees out of phase. During normal op-
eration, each external top MOSFET is turned on when the
clock for that channel sets the RS latch, and is turned off
when the main current comparator, ICMP, resets the RS
latch. The peak inductor current at which ICMP trips and
resets the latch is controlled by the voltage on the I
TH
pin,
which is the output of the error amplifier, EA. The error
amplifier compares the output voltage feedback signal at
the V
FB
pin (which is generated with an external resistor
divider connected across the output voltage, V
OUT
, to
ground) to the internal 0.800V reference voltage. When the
load current increases, it causes a slight decrease in V
FB
relative to the reference, which causes the EA to increase
the I
TH
voltage until the average inductor current matches
the new load current.
After the top MOSFET is turned off each cycle, the bottom
MOSFET is turned on until either the inductor current starts
to reverse, as indicated by the current comparator IR, or
the beginning of the next clock cycle.
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTV
CC
pin. When
the EXTV
CC
pin is left open or tied to a voltage less than
4.7V, the V
IN
LDO (low dropout linear regulator) supplies
5.1V from V
IN
to INTV
CC
. If EXTV
CC
is taken above 4.7V,
the V
IN
LDO is turned off and the EXTV
CC
LDO is turned
on. Once enabled, the EXTV
CC
LDO supplies 5.1V from
EXTV
CC
to INTV
CC
. Using the EXTV
CC
pin allows the INTV
CC
power to be derived from a high efficiency external source
such as one of the LTC3858-2 switching regulator outputs.
Each top MOSFET driver is biased from the floating boot-
strap capacitor, C
B
, which normally recharges during each
switching cycle through an external diode when the top
MOSFET turns off. If the input voltage, V
IN
, decreases to
a voltage close to V
OUT
, the loop may enter dropout and
attempt to turn on the top MOSFET continuously. The
dropout detector detects this and forces the top MOSFET
off for about one-twelfth of the clock period every tenth
cycle to allow C
B
to recharge.
LTC3858-2
12
38582f
OPERATION
(Refer to the Functional Diagram)
Shutdown and Start-Up (RUN1, RUN2
and SS1, SS2 Pins)
The two channels of the LTC3858-2 can be independently
shut down using the RUN1 and RUN2 pins. Pulling either of
these pins below 1.26V shuts down the main control loop
for that controller. Pulling both pins below 0.7V disables
both controllers and most internal circuits, including the
INTV
CC
LDOs. In this state, the LTC3858-2 draws only 8µA
of quiescent current.
The RUN pin may be externally pulled up or driven directly
by logic. When driving the RUN pin with a low impedance
source, do not exceed the absolute maximum rating of
8V. The RUN pin has an internal 11V voltage clamp that
allows the RUN pin to be connected through a resistor to a
higher voltage (for example, V
IN
), so long as the maximum
current into the RUN pin does not exceed 100µA.
The start-up of each controllers output voltage, V
OUT
, is
controlled by the voltage on the SS pin for that channel.
When the voltage on the SS pin is less than the 0.8V
internal reference, the LTC3858-2 regulates the V
FB
volt-
age to the SS pin voltage instead of the 0.8V reference.
This allows the SS pin to be used to program a soft-start
by connecting an external capacitor from the SS pin to
SGND. An internal 1µA pull-up current charges this ca-
pacitor creating a voltage ramp on the SS pin. As the SS
voltage rises linearly from 0V to 0.8V (and beyond up to
the absolute maximum rating of 6V), the output voltage
V
OUT
rises smoothly from zero to its final value.
Alternatively, the SS pin can be used to cause the start-
up of V
OUT
to track that of another supply. Typically, this
requires connecting to the SS pin an external resistor
divider from the other supply to ground (see the Applica-
tions Information section).
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping or Forced Continuous)
(PLLIN/MODE Pin)
The LTC3858-2 can be enabled to enter high efficiency
Burst Mode operation, constant frequency pulse-skipping
mode, or forced continuous conduction mode at low
load currents. To select Burst Mode operation, tie the
PLLIN/ MODE pin to ground. To select forced continuous
operation, tie the PLLIN/MODE pin to INTV
CC
. To select
pulse-skipping mode, tie the PLLIN/MODE pin to a DC
voltage greater than 1.2V and less than INTV
CC
– 1.3V.
When a controller is enabled for Burst Mode operation, the
minimum peak current in the inductor is set to approxi-
mately 30% of the maximum sense voltage even though
the voltage on the I
TH
pin indicates a lower value. If the
average inductor current is higher than the load current,
the error amplifier EA will decrease the voltage on the I
TH
pin. When the I
TH
voltage drops below 0.425V, the internal
sleep signal goes high (enabling “sleep” mode) and both
external MOSFETs are turned off.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current. If one channel is shut down
and the other channel is in sleep mode, the LTC3858-2
draws only 170µA of quiescent current. If both channels
are in sleep mode, the LTC3858-2 draws only 300µA of qui-
escent current. In sleep mode, the load current is supplied
by the output capacitor. As the output voltage decreases,
the EAs output begins to rise. When the output voltage
drops enough, the I
TH
pin is reconnected to the output
of the EA, the sleep signal goes low, and the controller
resumes normal operation by turning on the top external
MOSFET on the next cycle of the internal oscillator.
When a controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator, IR, turns off the bottom external
MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus,
the controller is in discontinuous operation.

LTC3858IUH-2#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Low IQ, Dual, 2-Phase Synchronous Step-Down Controller without OVP
Lifecycle:
New from this manufacturer.
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