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LTC3858IUH-2#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P40
LTC3858-2
22
38582f
TIME
OUTPUT VOLTAGE
38582 F07a
V
X(MASTER)
V
OUT(SLAVE)
TIME
38582 F07b
OUTPUT VOLTAGE
V
X(MASTER)
V
OUT(SLAVE)
(7a) Coincident Tracking (7b) Ratiometric Tracking
Figure 7. Two Different Modes of Output Voltage Tracking
Alternatively, the SS pin can be used to track two (or
more) supplies during start-up, as shown qualitatively in
Figures 7a and 7b. To do this, a resistor divider should
be connected from the master supply (V
X
) to the SS
pin of the slave supply (V
OUT
), as shown in Figure 8. Dur-
ing start-up, V
OUT
will track V
X
according to the ratio set
by the resistor divider:
V
X
V
OUT
=
R
A
R
TRACKA
•
R
TRACKA
+ R
TRACKB
R
A
+ R
B
APPLICATIONS INFORMATION
For coincident tracking (V
OUT
= V
X
during start-up):
R
A
= R
TRACKA
R
B
= R
TRACKB
1/2 LTC3858-2
V
OUT
V
x
V
FB
SS
38582 F08
R
B
R
A
R
TRACKA
R
TRACKB
Figure 8. Using the SS Pin for Tracking
LTC3858-2
23
38582f
APPLICATIONS INFORMATION
INTV
CC
Regulators
The LTC3858-2 features two separate internal P-channel
low dropout linear regulators (LDO) that supply power at
the INTV
CC
pin from either the V
IN
supply pin or the EXT-
V
CC
pin depending on the connection of the EXTV
CC
pin.
INTV
CC
powers the gate drivers and much of the internal
circuitry. The V
IN
LDO and the EXTV
CC
LDO regulate IN-
TV
CC
to 5.1V. Each of these can supply a peak current of
50mA and must be bypassed to ground with a minimum
of 4.7µF low ESR capacitor. Regardless of what type of
bulk capacitor is used, an additional 1µF ceramic capacitor
placed directly adjacent to the INTV
CC
and PGND pins is
highly recommended. Good bypassing is needed to supply
the high transient currents required by the MOSFET gate
drivers and to prevent interaction between the channels.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3858-2 to be
exceeded. The INTV
CC
current, which is dominated by the
gate charge current, may be supplied by either the V
IN
LDO
or the EXTV
CC
LDO. When the voltage on the EXTV
CC
pin
is less than 4.7V, the V
IN
LDO is enabled. Power dissipa-
tion for the IC in this case is highest and is equal to V
IN
•
I
INTVCC
. The gate charge current is dependent on operating
frequency as discussed in the Efficiency Considerations
section. The junction temperature can be estimated by
using the equations given in Note 3 of the Electrical Char-
acteristics. For example, the LTC3858-2 INTV
CC
current
is limited to less than 32mA from a 40V supply when not
using the EXTV
CC
supply at 70°C ambient temperature:
T
J
= 70°C + (32mA)(40V)(43°C/W) = 125°C
To prevent the maximum junction temperature from be-
ing exceeded, the input supply current must be checked
while operating in forced continuous mode (PLLIN/MODE
= INTV
CC
) at maximum V
IN
.
When the voltage applied to EXTV
CC
rises above 4.7V, the
V
IN
LDO is turned off and the EXTV
CC
LDO is enabled. The
EXTV
CC
LDO remains on as long as the voltage applied to
EXTV
CC
remains above 4.5V. The EXTV
CC
LDO attempts
to regulate the INTV
CC
voltage to 5.1V, so while EXTV
CC
is less than 5.1V, the LDO is in dropout and the INTV
CC
voltage is approximately equal to EXTV
CC
. When EXTV
CC
is greater than 5.1V, up to an absolute maximum of 14V,
INTV
CC
is regulated to 5.1V.
Using the EXTV
CC
LDO allows the MOSFET driver and
control power to be derived from one of the switching
regulator outputs (4.7V ≤ V
OUT
≤ 14V) during normal
operation and from the V
IN
LDO when the output is out
of regulation (e.g., start-up, short-circuit). If more current
is required through the EXTV
CC
LDO than is specified, an
external Schottky diode can be added between the EXTV
CC
and INTV
CC
pins. In this case, do not apply more than
6V to the EXTV
CC
pin and make sure that EXTV
CC
≤ V
IN
.
Significant efficiency and thermal gains can be realized
by powering INTV
CC
from the output, since the V
IN
cur-
rent resulting from the driver and control currents will be
scaled by a factor of (Duty Cycle)/(Switcher Efficiency).
For 5V to 14V regulator outputs, this means connecting
the EXTV
CC
pin directly to V
OUT
. Tying the EXTV
CC
pin to
an 8.5V supply reduces the junction temperature in the
previous example from 125°C to:
T
J
= 70°C + (32mA)(8.5V)(43°C/W) = 82°C
However, for 3.3V and other low voltage outputs, additional
circuitry is required to derive INTV
CC
power from the output.
The following list summarizes the four possible connec-
tions for EXTV
CC
:
1. EXTV
CC
Grounded. This will cause INTV
CC
to be powered
from the internal 5.1V regulator resulting in an efficiency
penalty of up to 10% at high input voltages.
2. EXTV
CC
Connected Directly to V
OUT
. This is the normal
connection for a 5V to 14V regulator and provides the
highest efficiency.
3. EXTV
CC
Connected to an External Supply. If an external
supply is available in the 5V to 14V range, it may be
used to power EXTV
CC
. Ensure that EXTV
CC
< V
IN
.
4. EXTV
CC
Connected to an Output-Derived Boost Network.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTV
CC
to an
output-derived voltage that has been boosted to greater
than 4.7V. This can be done with the capacitive charge
pump shown in Figure 9. Ensure that EXTV
CC
< V
IN
.
LTC3858-2
24
38582f
APPLICATIONS INFORMATION
Figure 9. Capacitive Charge Pump for EXTV
CC
Topside MOSFET Driver Supply (C
B
, D
B
)
External bootstrap capacitors, C
B
, connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor C
B
in the Functional Diagram is charged though
external diode D
B
from INTV
CC
when the SW pin is low.
When one of the topside MOSFETs is turned on, the driver
places the C
B
voltage across the gate-source of the desired
MOSFET. This enhances the top MOSFET switch and turns
it on. The switch node voltage, SW, rises to V
IN
and the
BOOST pin follows. With the topside MOSFET on, the
boost voltage is above the input supply: V
BOOST
= V
IN
+
V
INTVCC
. The value of the boost capacitor, C
B
, needs to be
100 times that of the total input capacitance of the top-
side MOSFET(s). The reverse breakdown of the external
Schottky diode must be greater than V
IN(MAX)
.
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
Fault Conditions: Current Limit and Current Foldback
When the output current hits the current limit, the output
voltage begins to drop. If the output voltage falls below
70% of its nominal output level, then the maximum
sense voltage is progressively lowered to about half of
its maximum selected value. Under short-circuit condi-
tions with very low duty cycles, the LTC3858-2 will begin
cycle skipping in order to limit the short-circuit current.
In this situation the bottom MOSFET will be dissipating
most of the power but less than in normal operation. The
short-circuit ripple current is determined by the minimum
on-time, t
ON(MIN)
, of the LTC3858-2 (≈95ns), the input
voltage and inductor value:
ΔI
L(SC)
= t
ON(MIN)
V
IN
L
⎛
⎝
⎜
⎞
⎠
⎟
The resulting average short-circuit current is:
I
SC
=
50% • I
LIM(MAX)
R
SENSE
–
1
2
ΔI
L(SC)
Phase-Locked Loop and Frequency Synchronization
The LTC3858-2 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a lowpass filter,
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the top MOSFET of controller 1 to be locked to
the rising edge of an external clock signal applied to the
PLLIN/MODE pin. The turn-on of controller 2’s top MOSFET
is thus 180 degrees out of phase with the external clock.
The phase detector is an edge sensitive digital type that
provides zero degrees phase shift between the external
and internal oscillators. This type of phase detector does
not exhibit false lock to harmonics of the external clock.
When not prebiased, applying an external clock will invoke
traditional PLL operation. If the external clock frequency is
greater than the internal oscillator’s frequency, f
OSC
, then
current is sourced continuously from the phase detector
output, pulling up the VCO input. When the external clock
frequency is less than f
OSC
, current is sunk continuously,
pulling down the VCO input. If the external and internal
frequencies are the same but exhibit a phase difference,
the current sources turn on for an amount of time cor-
responding to the phase difference. The voltage at the
VCO input is adjusted until the phase and frequency of
the internal and external oscillators are identical. At the
stable operating point, the phase detector output is high
impedance and the internal filter capacitor, C
LP
, holds the
voltage at the VCO input.
EXTV
CC
V
IN
TG1
SW
BG1
PGND
1/2 LTC3858-2
R
SENSE
V
OUT
VN2222LL
C
OUT
38582 F09
MBOT
MTOP
C
IN
V
IN
L
D
BAT85 BAT85
BAT85
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LTC3858IUH-2#PBF

Mfr. #:
Buy LTC3858IUH-2#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Low IQ, Dual, 2-Phase Synchronous Step-Down Controller without OVP
Lifecycle:
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