STA120
10/15
The validity flag indicates that the validity bit for a previous sample was high since the last clearing of the
error codes. The slipped sample error can only occur when FSYNC and SCK of the audio serial port are
inputs. In this case, if FSYNC is asynchronous to the received data rate, periodically a stereo sample will
be dropped or reread depending on whether the read rate is slower or faster than the received data rate .
When this occurs, the slipped sample error code will appear on the "E" pins.
The CRC error is updated at the beginning of a channel status block, and is only valid when the profes-
sional format of channel status data is received. This error is indicated when the STA120 calculated CRC
value does not match the CRC byte of the channel status block or when a block boundary changes (as in
removing samples while editing).
The parity error occurs when the incoming sub-frame does not have even parity as specified by the stan-
dards. The biphase coding error indicates a biphase coding violation occurred. The no lock error indicates
that the PLL is not locked onto the incoming data stream. Lock is achieved after receiving three frame pre-
ambles then one block preamble, and is lost after not receiving four consecutive frame preambles.
The receive frequency information is encoded on pins F2, F1 and F0, and is decoded as shown in Table
6. The on-chip frequency comparator compares the received clock frequency to an externally supplied
6.144MHz clock which is input on the FCK pin. The "F" pins. The clock on FCK must be valid for two thirds
of a block for the "F" pins to be accurate.
Table 4. Sample Frequency Decoding
Channel Status Reporting
When SEL is high, channel status is displayed on C0, and Ca-Ce for the channel selected by CS12. If
CS12 is low, channel status for sub-frame1 is displayed, and if CS12 is high, channel status for subframe
2 is displayed. the contents of Ca-Ce depend upon the C0 professional/consumer bit. The information re-
port is shown in Table 5.
Table 5. Channel Status Pins
F2 F1 F0 Error
0 0 0 Out of Range
0 0 1 48KHz ±4%
0 1 0 44.1KHz ±4%
0 1 1 32KHz ±4%
1 0 0 48KHz ±400ppm
1 0 1 44.1KHz ±400ppm
1 1 0 44.056KHz ±400ppm
1 1 1 32KHz ±400ppm
Pin Professional Consumer
C0 0 (low) 1 (high)
Ca C1 C1
Cb EM0 C2
Cc EM1 C3
Cd C9 ORIG
Ce CRCE IGCAT
11/15
STA120
Professional Channel Status (C0 = 0)
When C0 is low, the received channel status block is encoded according to the professional / broadcast
format. The Ca through Ce pins are defined for some of the more important professional bits. As listed in
Table 5, Ca is the inverse of channel status bit1. Therefore, if the incoming channel status bit1. Therefore,
if the incoming channel status bit 1 is 1, Ca, defined as C1, will be 0. C1 indicates whether audio (C1 = 1)
or non-audio (C1 = 0) data is being received. Cb and Cc, defined as EM0 and EM1 respectively, indicate
emphasis and are encoded version of channel status bits 2, 3, and 4. The decoding is listed in Table 6.
Cd, defined as C9, is the inverse of channel status bit 9, which gives some indication of channel status bit
9, which gives some indication of channel mode. (Bit 9 is also defined as bit 1 of byte 1). When Ce, defined
as CRCE, is low, the STA120 calculated CRC value does not match the received CRC value. This signal
may be used to qualify Ca through Cd. If Ca through Ce are being displayed, Ce going low can indicate
not to update the display.
Table 6. Emphasis Encoding
Consumer Channel Status (C0 = 1)
When C0 is high, the received channel status block is encoded according to the consumer format. In this
case Ca through Ce are defined differently as shown in Table 5.
Ca is the inverse of channel status bit 1, C1, indicating audio (C1 = 1) or non-audio (C1 = 0). Cb is defined
as the inverse of channel status bit 2, C2, which indicates copy inhibit/copyright information Cc, defined
as C3
, is the emphasis bit of channel status, with C3 low indicating the data has had pre-emphasis added.
The audio standards, in consumer mode, describe bit 15, L, as the generation status which indicates
whether the audio data is an original work or a copy (1st generation or higher). The definition of the Lbit is
reversed for three category codes: two broadcast codes, and laser-optical (CD's). Therefore, to interpret
the L bit properly, the category code must be decoded. The STA120 does this decoding internally and pro-
vides the ORIG
signal that, when low, indicates that the audio data is original over all category codes.
SCMS
The consumer audio standards also mention a serial copy management system, SCMS, for dealing with
copy protection of copyrighted works. SCMS is designed to allow unlimited duplication of the original work,
but no duplication of any copies of the original. This system utilizes the channel status bit 2, Copy, and
channel status bit 15, L or generation status, along with the category codes. If the Copy bit is 0, copyright
protection is asserted over the material is an original or a duplication. (As mentioned in the previous para-
graph, the definition of the L bit can be reversed based on the category codes.) There are two category
codes that get special attention: general and A/D converters without C or L bit information. For these two
categories the SCMS standard requires that equipment interfacing to these categories set the C bit to 0
(copyright protection asserted) and the L bit to 1 (original). To support this feature, Ce, in the consumer
mode, is defined as IGCAT
(ignorant category) which is low for the "general" (0000000) and "A/D convert-
er without copyright information" (01100xx) categories.
EM1 EM0 C2 C3 C4 Emphasis
0 0 1 1 1 CCITT J.17 emphasis
0 1 1 1 0 50/15ms emphasis
1 0 1 0 0 No emphasis
1 1 0 0 0 Not indicated
STA120
12/15
APPENDIX A: RS422 RECEIVER INFORMATION
The RS422 receivers on the STA120 is designed to receive both the professional and consumer interfac-
es, and meet all specifications listed in the digital audio standards. Figure 6 illustrates the internal sche-
matic of the receiver portion of both chips. The receiver has a differential input. A Schmitt trigger is
incorporated to add hysteresis which prevents noisy signals from corrupting the phase detector.
Figure 6. RS422 Receiver Internal Circuit
Professional Interface
The digital audio specifications for professional use call for a balanced receiver, using XLR connectors,
with 110
±20% impedance. (The XLR connector on the receiver should have female pins with a male
shell.) Since the receiver has a very high impedance, a 110
resistor should be placed across the receiv-
er terminals to match the line impedance, as shown in figure 7, and, since the part has internal biasing,
no external biasing network is needed. If some isolation is desired without the use of transformers, a
0.01
µ
F capacitor should be placed on the input of esch pin (RXP and RXN) as shown in Figure 8. How-
ever, if transformers are not used, high frequency energy could be coupled between transmitter and re-
ceiver causing degradation in analog performance.
Although transformers are not required by AES they are strongly recommended. The EBU requires trans-
formers. Figure 7 and 8 show an optional DC blocking capacitor on the transmission line. A 0.1 to 0.47
µ
F
ceramic capacitor may be used to block any DC voltage that is accidentally connected to the digital audio
receiver. The use of this capacitor is an issue of robustness s the digital audio transmission line does not
have a DC voltage component.
Figure 7. Professional Input Circuit
Figure 8. Transformerless Professional Circuit
K-i
x
1K
1K
i
x
D98AU983
RXP
RXN
110
RXP
RXN
(*)See Text
110
TWISTED
PAIR
D98AU984A
XLR
1
110
RXP
RXN
(*)See Text
110
TWISTED
PAIR
D98AU985A
XLR
1
0.01µF
0.01µF

STA120DJ

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Audio Transmitters, Receivers, Transceivers Digital audio interface receiver
Lifecycle:
New from this manufacturer.
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