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NB6N239SMNR2

P1-P3P4-P6P7-P9P10-P12
NB6N239S
http://onsemi.com
4
Table 5. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
75 kW
75 kW
ESD Protection Human Body Model
Machine Model
Charged Device Model
> 1500 V
> 100 V
> 1000 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb−Free Pkg
QFN−16 Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 370
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
Table 6. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
Positive Mode Power Supply GND = 0 V 3.6 V
V
I
Input Voltage GND = 0 V GND v V
I
v V
CC
3.6 V
I
SC
Output Short Circuit Current Line−to−Line
Line−to−GND
TIA/EIA − 644 Compliant
12
24
mA
mA
I
BBAC
V
BBAC
Sink/Source Current ± 0.5 mA
T
A
Operating Temperature Range −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
41.6
35.2
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) Standard Board 4.0 °C/W
T
sol
Wave Solder Pb−Free 265 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may
affect device reliability.
NB6N239S
http://onsemi.com
5
Table 7. DC CHARACTERISTICS, CLOCK INPUTS, LVDS OUTPUTS
(V
CC
= 3.0 V to 3.465 V, GND = 0 V)
Symbol Characteristic
−405C 255C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
CC
Power Supply Cur-
rent (Inputs and
Outputs OPEN)
35 45 55 mA
V
OH
Output HIGH
Voltage (Notes 2)
1600 1600 1600 mV
V
OL
Output LOW
Voltage (Notes 2)
900 900 900 mV
V
OD
Differential Output
Voltage (Figure 21)
250
450 250 450 250 450 mV
DV
OD
V
OD
Magnitude
Change
0
50 0 50 0 50 mV
V
OS
Offset Voltage
(Figure 21)
1125
1375 1125 1375 1125 1375 mV
DV
OS
V
OS
Magnitude
Change
0
50 0 50 0 50 mV
DIFFERENTIAL INPUT DRIVEN SINGLE−ENDED (Figures 7, 10)
V
th
Input Threshold
Reference Voltage
(Note 3)
100 V
CC
− 100 100 V
CC
− 100 100 V
CC
− 100 mV
V
IH
Single−ended Input
HIGH Voltage
V
th
+ 100 V
CC
V
th
+ 100 V
CC
V
th
+ 100 V
CC
mV
V
IL
Single−ended Input
LOW Voltage
GND V
th
− 100 GND V
th
− 100 GND V
th
− 100 mV
V
BBAC
Output Voltage Ref-
erence @ 100 mA
(Note 6)
V
CC
=
3.3 V
V
CC
−1460
1840
V
CC
−
1330
1970
V
CC
−1200
2100
V
CC
−1460
1840
V
CC
−
1340
1960
V
CC
−1200
2100
V
CC
−1460
1840
V
CC
−
1350
1950
V
CC
−1200
2100
mV
DIFFERENTIAL INPUT DRIVEN DIFFERENTIALLY (Figures 8, 9, 11) (Note 5)
V
IHD
Differential Input
HIGH Voltage
100 V
CC
100 V
CC
100 V
CC
mV
V
ILD
Differential Input
LOW Voltage
GND V
CC
– 100 GND V
CC
– 100 GND V
CC
– 100 mV
V
CMR
Input Common
Mode Range (Dif-
ferential Cross−
point Voltage)
(Note 4)
50 V
CC
– 50 50 V
CC
– 50 50 V
CC
– 50 mV
V
ID
Differential Input
Voltage (V
IHD(CLK)
− V
ILD(CLK)
) and
(V
IHD(CLK)
−
V
ILD(CLK)
)
100 V
CC
− GND 100 V
CC
− GND 100 V
CC
− GND mV
R
TIN
Internal Input Ter-
mination Resistor
45 50 55 45 50 55 45 50 55
W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Outputs loaded with 100 W across LVDS outputs.
3. V
th
is applied to the complementary input when operating in single−ended mode.
4. VCMR
MIN
varies 1:1 with GND, VCMR
MAX
varies 1:1 with V
CC
.
5. Input and output voltage swing is a single−ended measurement operating in differential mode.
6. V
BBAC
used to rebias capacitor−coupled inputs only (see Figures 16 and 17).
NB6N239S
http://onsemi.com
6
Table 8. DC CHARACTERISTICS, LVTTL/LVCMOS INPUTS (V
CC
= 3.0 V to 3.465 V, GND = 0 V, T
A
= −40°C to +85°C)
Symbol
Characteristic Min Typ Max Unit
V
IH
Input HIGH Voltage (LVCMOS/LVTTL) 2.0 V
CC
V
V
IL
Input LOW Voltage (LVCMOS/LVTTL) GND 0.8 V
I
IH
Input HIGH Current −150 150
mA
I
IL
Input LOW Current −150 150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 9. AC CHARACTERISTICS V
CC
= 3.0 V to 3.465 V; GND = 0 V (Note 7)
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
f
inMAX
Maximum Input CLOCK Frequency
QA/QB = (B2, B4, B8, B16)
QA = (B1)
3.0
1.5
3.0
1.5
3.0
1.5
GHz
V
OUTPP
Output Voltage Amplitude (Notes 9, 10)
QA(B2, 4, 8), QB(Bn) f
in
v 3.0 GHz
QA(B1), QB(Bn) f
in
v 1.5 GHz
200
200
350
350
450
450
200
200
350
350
450
450
200
200
350
350
450
450
mV
t
PLH
,
t
PHL
Propagation Delay to CLK, Qn
Output Differential @ 50 MHz MR
, Qn
550
420
780
660
550
420
780
660
550
420
780
660
ps
t
RR
Reset Recovery 0 −90 0 −90 0 −90 ps
t
s
Setup Time @ 50 MHz EN, CLK
SELA/B, CLK
0
0
−60
−300
0
0
−60
−300
0
0
−60
−300
ps
t
h
Hold Time @ 50 MHz CLK, EN
CLK, SELA/B
150
700
65
200
150
700
65
200
150
700
65
200
ps
t
skew
Within−Device Skew @ 50 MHz (Note 8)
Device−to−Device Skew (Note 8)
Duty Cycle Skew (Note 8)
5
25
25
30
80
40
5
30
30
30
90
45
6
30
30
35
90
45
ps
t
PW
Minimum Pulse Width MR 550 550 550 ps
t
JITTER
RMS Random Clock Jitter 2 2 2 ps
V
INPP
Input Voltage Swing (Differential Configuration)
(Note 9)
100 V
CC
−GND
100 V
CC
−GND
100 V
CC
−GND
mV
t
r
t
f
Output Rise/Fall Times @ 50 MHz Qn, Qn
(20% − 80%)
70 120 190 70 120 190 70 120 190 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
7. Measured using a 750 mV, 50% duty cycle clock source. All loading with 100 W across LVDS outputs.
8. Skew is measured between outputs under identical transitions and conditions. Duty cycle skew is defined only for differential operation
when the delays are measured from the cross point of the inputs to the cross point of the outputs.
9. Input and output voltage swing is a single−ended measurement operating in differential mode.
10.Output Voltage Amplitude (V
OHCLK
− V
OLCLK
) at input CLOCK frequency, f
in
. The output frequency, f
out
, is the input CLOCK frequency
divided by n, f
out
= f
in
B n. Input CLOCK frequency is v3.0 GHz.
P1-P3P4-P6P7-P9P10-P12

NB6N239SMNR2

Mfr. #:
Buy NB6N239SMNR2
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution 3.3V 3GHz LVDS OUT
Lifecycle:
New from this manufacturer.
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