4
LTC1702
1702fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Efficiency vs Load Current
TEMPERATURE (°C)
–50
SUPPLY CURRENT (mA)
2.4
PV
CC
V
CC
25
1702 G04
1.8
1.4
–25 0 50
1.2
1.0
2.6
2.2
2.0
1.6
75 100 125
BOOST1, BOOST2
TEST CIRCUIT 1
C
L
= 0pF
Transient Response
TEMPERATURE (°C)
–50
2.5
NORMALIZED FREQUENCY (%)
2.0
1.0
0.5
0
2.5
1.0
0
50
75
1702 G05
1.5
1.5
2.0
0.5
–25
25
100
125
V
CC
= 5V
TEMPERATURE (°C)
–50
0.4
R
ON
()
0.5
0.7
0.8
0.9
1.4
1.1
0
50
75
1702 G06
0.6
1.2
1.3
1.0
–25
25
100
125
V
PVCC
= 5V
V
BOOST
– V
SW
= 5V
MOSFET Driver Supply Current
vs Gate Capacitance
Supply Current vs Temperature
Normalized Frequency
vs Temperature Driver R
ON
vs Temperature
RUN/SS Source Current
vs Temperature
TEMPERATURE (°C)
–50
SOURCE CURRENT (µA)
4.0
4.5
5.0
25 75
1702 G07
3.5
3.0
–25 0
50 100 125
2.5
2.0
V
CC
= 5V
Nonoverlap Time vs Temperature Driver Rise/Fall vs Temperature
LOAD CURRENT (A)
0
70
EFFICIENCY (%)
80
90
100
510
1702 G01
15
V
IN
= 5V
V
OUT
= 3.3V
V
OUT
= 2.5V
V
OUT
= 1.6V
V
IN
= 5V
V
OUT
= 1.8V
I
LOAD
= 0A-10A-0A
±2.2% MAX DEVIATION
1702 G02
GATE CAPACITANCE (pF)
0
25
30
35
6000 8000
1702 G03
20
15
2000 4000 10000
10
5
0
DRIVER SUPPLY CURRENT (mA)
TEST CIRCUIT 1
ONE DRIVER LOADED
MULTIPLY BY # OF ACTIVE
DRIVERS TO OBTAIN TOTAL
DRIVER SUPPLY CURRENT
TEMPERATURE (°C)
–50
40
50
70
25 75
1702 G08
30
20
–25 0
50 100 125
10
0
60
NONOVERLAP (ns)
TEST CIRCUIT 1
C
L
= 2000pF
BG FALLING EDGE
TG RISING EDGE
TG FALLING EDGE
BG RISING EDGE
TEMPERATURE (°C)
50 –25
12
RISE/FALL TIME (ns)
12
15
0
50
75
1702 G09
11
14
13
25
100
125
TEST CIRCUIT 1
C
L
= 2000pF
20mV/
DIV
10µs/DIV
5
LTC1702
1702fa
PIN FUNCTIONS
UUU
FB1
falls 5% below its programmed value. When RUN/SS1
is low (side 1 shut down), PGOOD1 will go high.
FCB (Pin 8): Force Continuous Bar. The FCB pin forces
both converters to maintain continuous synchronous
operation regardless of load when the voltage at FCB
drops below 0.8V. FCB is normally tied to V
CC
. To force
continuous operation, tie FCB to SGND. FCB can also be
connected to a feedback resistor divider from a secondary
winding on one converter’s inductor to generate a third
regulated output voltage. Do not leave FCB floating.
RUN/SS1 (Pin 9): Controller 1 Run/Soft-start. Pulling
RUN/SS1 to SGND will disable controller 1 and turn off
both of its external MOSFET switches. Pulling both
RUN/SS pins down will shut down the entire LTC1702,
dropping the quiescent supply current below 100µA. A
capacitor from RUN/SS1 to SGND will control the turn-on
time and rate of rise of the controller 1 output voltage at
power-up. An internal 3.5µA current source pull-up at
RUN/SS1 pin sets the turn-on time at approximately
500ms/µF.
COMP1 (Pin 10): Controller 1 Loop Compensation. The
COMP1 pin is connected directly to the output of the first
controller’s error amplifier and the input to the PWM
comparator. An RC network is used at the COMP1 pin to
compensate the feedback loop for optimum transient
response.
SGND (Pin 11): Signal Ground. All internal low power
circuitry returns to the SGND pin. Connect to a low
impedance ground, separated from the PGND node. All
feedback, compensation and soft-start connections should
return to SGND. SGND and PGND should connect only at
a single point, near the PGND pin and the negative plate of
the C
IN
bypass capacitor.
FB1 (Pin 12): Controller 1 Feedback Input. FB1 should be
connected through a resistor network to V
OUT1
to set the
output voltage. The loop compensation network for con-
troller 1 also connects to FB1.
V
CC
(Pin 13): Power Supply Input. All internal circuits
except the output drivers are powered from this pin. V
CC
should be connected to a low noise power supply voltage
between 3V and 7V and should be bypassed to SGND with
at least a 1µF capacitor in close proximity to the LTC1702.
PV
CC
(Pin 1): Driver Power Supply Input. PV
CC
provides
power to the two BG
n
output drivers. PV
CC
must be
connected to a voltage high enough to fully turn on the
external MOSFETs QB1 and QB2. PV
CC
should generally
be connected directly to V
IN
. PV
CC
requires at least a 1µF
bypass capacitor directly to PGND.
BOOST1 (Pin 2): Controller 1 Top Gate Driver Supply. The
BOOST1 pin supplies power to the floating TG1 driver.
BOOST1 should be bypassed to SW1 with a 1µF capacitor.
An additional Schottky diode from V
IN
to BOOST1 pin will
create a complete floating charge-pumped supply at
BOOST1. No other external supplies are required.
BG1 (Pin 3): Controller 1 Bottom Gate Drive. The BG1 pin
drives the gate of the bottom N-channel synchronous
switch MOSFET, QB1. BG1 is designed to drive up to
10,000pF of gate capacitance directly. If RUN/SS1 goes
low, BG1 will go low, turning off QB1. If FAULT mode is
tripped, BG1 will go high and stay high, keeping QB1 on
until the power is cycled.
TG1 (Pin 4): Controller 1 Top Gate Drive. The TG1 pin
drives the gate of the top N-channel MOSFET, QT1. The
TG1 driver draws power from the BOOST1 pin and returns
to the SW1 pin, providing true floating drive to QT1. TG1
is designed to drive up to 10,000pF of gate capacitance
directly. In shutdown or fault modes, TG1 will go low.
SW1 (Pin 5): Controller 1 Switching Node. SW1 should be
connected to the switching node of converter 1. The TG1
driver ground returns to SW1, providing floating gate
drive to the top N-channel MOSFET switch, QT1. The
voltage at SW1 is compared to I
MAX1
by the current limit
comparator while the bottom MOSFET, QB1, is on.
I
MAX1
(Pin 6): Controller 1 Current Limit Set. The I
MAX1
pin sets the current limit comparator threshold for
controller 1. If the voltage drop across the bottom MOSFET,
QB1, exceeds the magnitude of the voltage at I
MAX1
,
controller 1 will go into current limit. The I
MAX1
pin has an
internal 10µA current source pull-up, allowing the current
threshold to be set with a single external resistor to PGND.
See the Current Limit Programming section for more
information on choosing R
IMAX
.
PGOOD1 (Pin 7): Controller 1 Power Good. PGOOD1 is an
open-drain logic output. PGOOD1 will pull low whenever
6
LTC1702
1702fa
FB2 (Pin 14): Controller 2 Feedback Input. See FB1.
COMP2 (Pin 15): Controller 2 Loop Compensation. See
COMP1.
RUN/SS2 (Pin 16): Controller 2 Run/Soft-start. See RUN/
SS1.
FAULT (Pin 17): Output Overvoltage Fault (Latched). The
FAULT pin is an open-drain output with an internal 10µA
pull-up. If either regulated output voltage rises more than
15% above its programmed value for more than 25µs, the
FAULT output will go high and the entire LTC1702 will be
disabled. When FAULT is high, both BG pins will go high,
turning on the bottom MOSFET switches and pulling down
the high output voltage. The LTC1702 will remain latched
in this state until the power is cycled. When FAULT mode
is active, the FAULT pin will be pulled up with an internal
10µA current source. Tying FAULT directly to PGND will
PIN FUNCTIONS
UUU
disable latched FAULT mode and will allow the LTC1702 to
resume normal operation when the overvoltage fault is
removed.
PGOOD2 (Pin 18): Controller 2 Power Good. See PGOOD1.
PGND (Pin 19): Power Ground. The BG
n
drivers return to
this pin. Connect PGND to a high current ground node in
close proximity to the sources of external MOSFETs, QB1
and QB2, and the V
IN
and V
OUT
bypass capacitors.
SW2 (Pin 20): Controller 2 Switching Node. See SW1.
TG2 (Pin 21): Controller 2 Top Gate Drive. See TG1.
BG2 (Pin 22): Controller 2 Bottom Gate Drive. See BG1.
BOOST2 (Pin 23): Controller 2 Top Gate Driver Supply.
See BOOST1.
I
MAX2
(Pin 24): Controller 2 Current Limit Set. See I
MAX1
.
BLOCK DIAGRAM
W
BURST
LOGIC
SOFT
START
90% DUTY CYCLE
RUN/SS1,2
COMP1,2
10µA
3.5µA
1V
P-P
550mV
800mV 760mV 840mV
I
MAX1,2
DRIVE
LOGIC
100µs
DELAY
OSC
550kHz
+
I
LIM
FB
MIN MAX
920mV
FLT
DIS
FCB
FB1,2
1702 BD
BOOST1,2
TG1,2
FROM
OTHER
CONTROLLER
SHUTDOWN TO
THIS CONTROLLER
SHUTDOWN TO
ENTIRE CHIP
FAULT
PV
CC
25µs
DELAY
FROM
OTHER
CONTROLLER
V
CC
SW1,2
BG1,2
PGND
SGND
PGOOD1,2

LTC1702IGN#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2x 550kHz Sync 2-PhSw Reg Cntr
Lifecycle:
New from this manufacturer.
Delivery:
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