1
FN6719.0
ISL94201
Multi-Cell Li-ion Battery Pack Analog
Front-End
The ISL94201 is an analog front end for a microcontroller in
a multi-cell Li-ion battery pack. The ISL94201 supports
battery pack configurations consisting of 4-cells to 7-cells in
series and 1 or more cells in parallel. The ISL94201 provides
an internal 3.3V voltage regulator, and cell voltage monitor
level shifters.
Using an internal analog multiplexer the ISL94201 provides
monitoring of each cell voltage plus internal and external
temperature by a separate microcontroller with an A/D
converter. Software on this microcontroller implements all
battery pack control functionality.
Features
Four Battery-Backed Software Controlled Flags
10% Accurate 3.3V Voltage Regulator (Minimum 25mA
Out With External NPN Transistor Having Current Gain
of 70)
Monitored Cell Voltage Output Stable In 100µs
•Simple I
2
C Host Interface
Sleep Operation With Programmable Negative Edge or
Positive Edge Wake-Up
<10µA Sleep Mode
Pb-Free (RoHS compliant)
Applications
Power Tools
Battery Backup Systems
•E-Bikes
Portable Test Equipment
Medical Systems
Hybrid Vehicle
Military Electronics
Pinout
ISL94201
(24 LD QFN)
TOP VIEW
Ordering Information
PART NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL94201IRZ 942 01IRTZ 24 Ld 4x4 QFN L24.4x4D
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
SCL
SDA
WKUP
RGC
RGO
TEMP3V
VCELL3
VCELL2
VCELL1
VSS
VSS
VSS
NC
VC7/VCC
VCELL6
VCELL5
NC
VCELL4
TEMPI
AO
NC
NC
NC
VSS
1
2
3
4
5
6
18
17
16
15
14
13
24 23 22 21 20 19
789101112
Data Sheet July 3, 2008
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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2
FN6719.0
July 3, 2008
Functional Diagram
3.3VDC
REGULATOR
VSS
VC7/VCC
SDA
VCELL6
VCELL5
VCELL4
RGO
VCELL3
AO
VCELL2
VCELL1
TEMP3V
SCL
REGISTERS
RGC
WKUP
POWER
CONTROL
MUX
7
BACKUP
SUPPLY
CONTROL
LOGIC
LEVEL
SHIFTERS
CELL
VOLTAGES
OSC
TEMPERATURE
SENSOR, INT/EXT
COMPARATOR
EXT TEMP
ENABLE
TEMPI
I
2
C I/F
2
Pin Descriptions
SYMBOL DESCRIPTION
VC7/VCC Battery cell 7 voltage input/VCC supply. This pin is used to monitor the voltage of this battery cell externally at pin AO. This pin also
provides the operating voltage for the IC circuitry.
VCELLN Battery cell N voltage input. This pin is used to monitor the voltage of this battery cell externally at pin AO. VCELLN connects to the
positive terminal of CELLN and the negative terminal of CELLN + 1.
VSS Ground. This pin connects to the most negative terminal in the battery string.
AO Analog multiplexer output. The analog output pin is used by an external microcontroller to monitor the cell voltages and temperature
sensor voltages. The microcontroller selects the specific voltage being applied to the output by writing to a control register.
TEMP3V Temperature monitor output control. This pin outputs a voltage to be used in a divider that consists of a fixed resistor and a
thermistor. The thermistor is located in close proximity to the cells. The TEMP3V output is connected internally to the RGO voltage
through a PMOS switch only during a measurement of the temperature, otherwise the TEMP3V output is off. The TEMP3V output can
be turned on continuously with a special control bit.
Microcontroller wake up control.
TEMPI Temperature monitor input. This pin inputs the voltage across a thermistor to determine the temperature of the cells. When this input
drops below TEMP3V/13, an external over-temperature condition exists. The TEMPI voltage is also fed to the AO output pin through
an analog multiplexer so the temperature of the cells can be monitored by the microcontroller.
RGO Regulated output voltage. This pin connects to the emitter of an external NPN transistor and works in conjunction with the RGC pin
to provides a regulated 3.3V. The voltage at this pin provides feedback for the regulator and power for many of the ISL94201internal
circuits as well as providing the 3.3V output voltage for the microcontroller and other external circuits.
RGC Regulated output control. This pin connects to the base of an external NPN transistor and works in conjunction with the RGO pin to
provide a regulated 3.3V. The RGC output provides the control signal for the external transistor to provide the 3.3V regulated voltage
on the RGO pin.
WKUP Wake up Voltage. This input wakes up the part when the voltage crosses a turn-on threshold (wake up is edge triggered). The
condition of the pin is reflected in the WKUP bit (The WKUP bit is level sensitive.)
WKPOL bit = ”1”: the device wakes up on the rising edge of the WKUP pin. Also, the WKUP bit is HIGH only when the WKUP pin
voltage > threshold.
WKPOL bit = ”0”, the device wakes up on the falling edge of the WKUP pin. Also, the WKUP bit is HIGH only when the WKUP pin
voltage < threshold.
SDA Serial Data. This is the bidirectional data line for an I
2
C interface.
SCL Serial Clock. This is the clock input for an I
2
C communication link.
ISL94201
3
FN6719.0
July 3, 2008
Absolute Maximum Ratings Thermal Information
Power Supply Voltage, VCC . . . . . . . . . .V
SS
- 0.5V to V
SS
+ 36.0V
Cell voltage, VCELL
VCELLN - (VCELLN - 1), VCELL1 - VSS . . . . . . . . . . . -0.5V to 5V
Terminal Voltage, V
TERM1
(SCL, SDA, TEMPI, RGO, AO, TEMP3V)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
- 0.5 to V
RGO
+ 0.5V
Terminal Voltage, V
TERM3
(WKUP)
. . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
- 0.5V to V
CC
(V
CC
<27V)
Terminal Voltage, V
TERM4
(RGC) . . . . . . . . . . . . . V
SS
- 0.5V to 5V
Terminal Voltage, V
TERM5
, (all other pins)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
- 0.5V to V
CC
+0.5V
Thermal Resistance (Typical, Notes 1, 2)
JA
(°C/W)
JC
(°C/W)
24 Ld QFN . . . . . . . . . . . . . . . . . . . . . . 32 2
Continuous Package Power Dissipation . . . . . . . . . . . . . . . . .400mW
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .-55 to +125°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 5V to 10V
Operating Voltage:
VCC pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.2V to 30.1V
VCELL1 - VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3V to 4.3V
VCELLN - (VCELLN-1) . . . . . . . . . . . . . . . . . . . . . . . 2.3V to 4.3V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Operating Specifications Over the recommended operating conditions unless otherwise specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested
PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Operating Voltage V
CC
9.2 30.1 V
Power-Up Condition 1 V
PORVCC
V
CC
voltage (Note 3) 4 9.2 V
Power-Up Condition 2 Threshold V
POR123
V
CELL1
- V
SS
and V
CELL2
- V
CELL1
and
V
CELL3
- V
CELL2
(rising) (Note 3)
1.1 1.7 2.3 V
Power-Up Condition 2 Hysteresis V
PORhys
V
CELL1
- V
SS
and V
CELL2
- V
CELL1
and
V
CELL3
- V
CELL2
(falling) (Note 3)
70 mV
3.3V Regulated Voltage V
RGO
0µA < I
RGC
< 350µA 3.0 3.3 3.6 V
3.3VDC Voltage Regulator Control
Current Limit
I
RGC
(Control current at output of RGC.
Recommend NPN with gain of 70+)
0.35 0.50 mA
V
CC
Supply Current I
VCC1
Power-up defaults, WKUP pin = 0V. 400 510 µA
RGO Supply Current I
RGO1
Power-up defaults, WKUP pin = 0V. 300 410 µA
V
CC
Supply Current I
VCC2
LDMONEN bit = 1, WKPOL bit = 1,
VWKUP = 10V, [AO3:AO0] bits = 03H.
500 700 µA
RGO Supply Current I
RGO2
LDMONEN bit = 1, WKPOL bit = 1,
VWKUP = 10V, [AO3:AO0] bits = 03H.
450 650 µA
V
CC
Supply Current I
VCC3
Default register settings, except
SLEEP bit = 1. WKUP pin = VCELL1
10 µA
RGO Supply Current I
RGO3
Default register settings, except
SLEEP bit = 1. WKUP pin = VCELL1
A
VCELL Input Current (V
CELL1
)I
VCELL1
AO3:AO0 bits = 0000H 14 µA
VCELL Input Current (V
CELLN
)I
VCELLN
AO3:AO0 bits = 0000H 10 µA
ISL94201

ISL94201IRZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Battery Management MULTI-CELL LI-ION BATRY PACK ANALOG
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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