13
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Symbol Table
Timing Diagrams
Start and Stop Timing
Input Timing
Output Timing
WAVEFORM INPUTS OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A Center Line
is High
Impedance
t
SU:STA
t
HD:STA
t
SU:STO
SCL
SDA
t
R
(START) (STOP)
t
F
t
R
t
F
SCL
SDA
t
HIGH
t
LOW
t
CYC
t
HD:DAT
t
SU:DAT
t
BUF
SCL
SDA
t
DH
t
AA
X9118
14
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XDCP Timing (For All Load Instructions)
Write Protect and Device Address Pins Timing
Applications Information
Basic Configurations of Electronic Potentiometers
SCL
SDA
R
W
(STOP)
LSB
t
WRL
SDA
SCL
...
...
...
WP
A0, A1
t
SU:WPA
t
HD:WPA
(START) (STOP)
(ANY INSTRUCTION)
X9118
15
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FN8161.5
April 9, 2014
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Application Circuits
X9118

X9118TV14I

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC DGTL POT 100KOHM 14TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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