EVAL-AD5422EBZ

CN-0278 Circuit Note
Output Noise During Silence
When a HART device is not transmitting (silent), it should not
couple noise onto the network in the HART extended frequency
band. Excessive noise may interfere with reception of HART
signals by the device itself or other devices on the network.
The voltage noise measured across a 500load must contain
no more than 2.2 mV rms of combined broadband and correlated
noise in the extended frequency band. This noise was measured
by connecting the HCF_TOOL-31 filter (available from the
HART Communication Foundation) across the 500 Ω load and
by connecting the output of the filter to a true rms meter (see
Figure 6). An oscilloscope was also used to examine the output
waveform peak-to-peak voltage.
The AD5422 output current was set to 4 mA, 12 mA, and 20 mA.
Results with the band-pass filter in place were very similar for all
three output current values, while the wide bandwidth noise
increased slightly as the current output value increased. The rms
values measured, with and without the HCF_TOOL-31 band-pass
filter in the case of 4 mA output current, were 143 µV rms and
1.4 mV rms, respectively. Both of these values are well within the
required specifications of 2.2 mV rms (with HART filter) and
138 mV rms (broadband noise without HART filter). For
12 mA output current, the rms values measured, with and
without the HCF_TOOL-31 band-pass filter were 158 µV rms
and 2.1 mV rms, respectively, again, both well within HART
protocol specifications.
AV
DD
DV
CC
4mA TO 20mA
CURRENT LOOP
0.1µF
2.7V TO 5.5V
10kΩ
CAP1
C1
4.7nF
12V
R
L
150pF
0.1µF
1.2M
1.2M
300pF
150k
3.6864MHz
36pF
36pF
500
DIGITAL TEST FILTER
HCF_TOOL-31
OSCILLOSCOPE OR
TRUE RMS METER
C
L
4.7nF
C
H
8.2nF
15kΩ
0.1µF
10µF
0.1µF
10µF
I
OUT
LATCH
AD5422
OP184
SCLK
SDIN
SDO
GND
CLEAR
FAULT
REFOUT
REFIN
R
SET
AV
SS
R
H
27kΩ
+V
SENSE
AD5700
HART_OUT
DGND
TXD
RXD
RTS
CD
XTAL1
XTAL2
VCC
ADC_IP
REF
1µF
AGND
CAP2
V
OUT
–V
SENSE
10803-006
Figure 6. HART Specifications Test Circuit
Rev. A | Page 4 of 10
Circuit Note CN-0278
Figure 7 and Figure 8 show the oscilloscope plots for 4 mA and
12 mA output current, respectively. Note that the filter has a
pass-band gain of 10. Channel 1 and Channel 2 on each plot
show the input and output of the filter, respectively.
CH1 20.0mV CH2 20.0mV M 50.0ms CH2 1.68mV
1.10428kHz
2
1
CH1
p-p
12.0mV
CH1
NONE
CH2
p-p
10.4mV
CH2
MAX
4.00mV
CH2
MIN
–6.40mV
MEASURE
10803-007
Figure 7. Noise at Input (CH1) and Output (CH2) of HART Filter with 4 mA
Output Current
CH1 20.0mV CH2 20.0mV M 50.0ms CH2 1.68mV
36.4011kHz
2
1
CH1
p-p
16.8mV
CH1
NONE
CH2
p-p
12.0mV
CH2
MAX
4.80mV
CH2
MIN
–7.20mV
MEASURE
10803-008
Figure 8. Noise at Input (CH1) and Output (CH2) of HART Filter with 12 mA
Output Current
Analog Rate of Change
This specification ensures that when a device regulates current,
the maximum rate of change of analog current does not interfere
with HART communications. Step changes in current disrupt
HART signaling. The same test circuit shown in Figure 6 was
used. For this test, the AD5422 was programmed to output a
cyclic waveform, switching from 4 mA to 20 mA with no delay
at either value, to ensure the maximum rate of change. To meet
the HART specifications, the waveform at the output of the filter
must not exhibit a peak voltage greater than 150 m V. Meeting
this requirement ensures that the maximum bandwidth of the
analog signaling is within the specified dc to 25 Hz frequency band.
The normal time for the output of the AD5422 to change from
4 mA to 20 mA is about 10 µs. This is obviously too fast and can
cause major disruption to a HART network. To reduce the rate of
change, the AD5422 employs two features: connecting capacitors
at the CAP1 and CAP2 pins, and an internal linear digital slew
rate control function (refer to the AD5422 data sheet for details).
For faster slew rates, a nonlinear digital ramp can be implemented
on the controller/FPGA communicating with the AD5422.
It requires very large capacitor values at CAP1 and CAP2 to
reduce the bandwidth below 25 Hz. The optimum solution is to
use a combination of the external capacitors and the digital slew
rate control function of the AD5422. The two capacitors, C1
and C2, have the effect of reducing the rate of change of the
analog signal; however, not sufficiently enough to meet the
specification. Enabling the slew rate control feature offers the
flexibility to set the rate of change.
CH1 5.00V CH2 50.0mV M 50.0ms CH1 6.20V
<10Hz
2
1
CH1
p-p
8.00V
CH1
FREQ
4.378Hz?
CH2
p-p
170mV
CH2
MAX
82.0mV
CH2
MIN
–88.0mV
MEASURE
10803-009
Figure 9. AD5422 Output (CH1) and HART Filter Output (CH2), SR Clock = 3,
SR Step = 2, C1 = 4.7 nF, C2 = NC
Figure 9 shows the output of the AD5422 and the output of the
HART filter. The peak voltage at the output of the filter is within
specification at 82 mV. The slew rate settings are SR clock = 3 and
SR step = 2, setting the transition time from 4 mA to 20 mA at
approximately 120 ms. C1 is 4.7 nF and C2 is unconnected. If
this rate of change is too slow, the slew time can be reduced.
With this circuit configuration of C1 = 4.7 nF and C2 unconnected,
it was found that setting up an 80 ms slew time (SR clock = 1,
SR step = 2) gave an analog rate of change result inside the HART
specification. However, reducing the slew time further, to 60 ms
(SR clock = 0, SR step = 2), pushed the result just outside of the
150 mV specification. The capacitor connected from CAP1 to
AV
DD
can be used to counteract the effect of the increased peak
voltage at the output of the filter due to faster slew times.
However, care must be taken when choosing this value because
it has an effect on the low-pass filter frequency cutoff discussed
in the Determining the Values of the External Components
section.
Rev. A | Page 5 of 10
CN-0278 Circuit Note
Figure 10 shows the results of changing the slew rate control
settings to SR clock = 5 and SR step = 2, while leaving the C1
capacitor value unchanged at 4.7 nF. This results in a transition
time of approximately 240 ms. The peak amplitude at the output
of the filter can be reduced further by increasing the value of
C1, configuring a slower slew rate, or a combination of both.
CH1
5.00V CH2 50.0mV M 50.0ms CH1 6.20V
<10Hz
2
1
CH1
p-p
8.00V
CH1
FREQ
?
CH2
p-p
88.0mV
CH2
MAX
42.0mV
CH2
MIN
–46.0mV
MEASURE
10803-010
Figure 10. AD5422 Output (CH1) and HART Filter Output (CH2), SR Clock = 5,
SR Step = 2, C1 = 4.7 nF, C2 = NC
Transient Voltage Protection
The AD5422 contains ESD protection diodes that prevent damage
from normal handling. The industrial control environment can,
however, subject I/O circuits to much higher transients. To protect
the AD5422 from excessively high voltage transients, external
power diodes and a surge current limiting resistor may be required,
as shown in Figure 1. The constraint on the resistor value, shown
in Figure 1 as 18 , is that during normal operation the output
level at I
OUT
must remain within its voltage compliance limit of
AV
DD
2.5 V, and the two protection diodes and resistor must have
the appropriate power ratings. With 18 , for a 4 mA to 20 mA
output, the compliance limit at the terminal is decreased by
V = I
MAX
× R = 0.36 V. There is also a 10 kΩ resistor shown at
the positive input of the OP184 buffer. This protects the amplifier
by limiting the current during a transient event. Further protection
can be provided with transient voltage suppressors (TVS) or
transorbs. These are available as both unidirectional and
bidirectional suppressors, and in a wide range of standoff
and breakdown voltage ratings. Size the TVS with the lowest
breakdown voltage possible while not conducting in the
functional range of the current output. It is recommended
that all remotely connected nodes be protected.
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur.
The iCoupler family of products from Analog Devices, Inc., provides
voltage isolation in excess of 2.5 kV. Further information on
iCoupler products is available at www.analog.com/icouplers. To
reduce the number of isolators required, nonessential signals, such
as CLEAR, can be connected to GND;
FAULT
and SDO can be
left unconnected, reducing the isolation requirements to only three
signals. However, note that either
FAULT
or SDO are required
to provide access to the fault detection features of the
AD5422.
COMMON VARIATIONS
A common variation on the circuit shown in Figure 1 is to use
the AD5420, which is similar to the AD5422, but contains only
a current output. It therefore does not contain the OP184 buffer
configuration at the output. This AD5420 and AD5700 HART
modem circuit is described in more detail in CN-0270. Circuit
Note CN-0065 provides extra information on an IEC 61000-
compliant solution for a fully isolated output module using the
AD5422 and the ADuM1401 digital isolator. Circuit Note CN-0233
contains information on providing power and data isolation using
the ADuM3471 PWM controller and transformer driver with
quad-channel isolators.
If multiple channels are required, the AD5755-1 quad voltage
and current output DAC may be used. This product has innovative
on-chip dynamic power control that minimizes package power
dissipation in current mode. Each channel has a corresponding
CHARTx pin so that HART signals can be coupled to the
current output of the AD5755-1.
The AD5421 and the AD5700 HART modem can be combined if
the requirement is a loop powered, 4 mA to 20 mA HART solution.
Such a HART enabled smart transmitter reference demo circuit
was developed by Analog Devices and uses the AD5421, the
ADuCM360, and the AD5700 modem. This circuit has been
compliance tested, verified, and registered as an approved
HART solution by the HART Communication Foundation.
CIRCUIT EVALUATION AND TEST
To build this circuit, it requires the use of the AD5422 evaluation
board (EVAL -AD5422EBZ, LFCSP version) and the AD5700-1
evaluation board (EVAL-AD5700-1EBZ), see Figure 11. As well as
the two evaluation boards, the circuit also requires three external
capacitors (C1, C
H
, and C
L
), a resistor (R
H
), a load resistor (R
L
),
a buffer amplifier, and a UART interface.
Rev. A | Page 6 of 10

EVAL-AD5422EBZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Data Conversion IC Development Tools EVAL BRD AD5422
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet