Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com (email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
- © Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
1. General description
The 74AHC08; 74AHCT08 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard JESD7-A.
The 74AHC08; 74AHCT08 provides the quad 2-input AND function.
2. Features
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accepts voltages higher than V
CC
For 74AHC08 only: operates with CMOS input levels
For 74AHCT08 only: operates with TTL input levels
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Multiple package options
Specified from 40 °C to +85 °C and from 40 °C to +125 °C
3. Ordering information
74AHC08; 74AHCT08
Quad 2-input AND gate
Rev. 03 — 14 November 2007 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AHC08D 40 °C to +125 °C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74AHCT08D
74AHC08PW 40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74AHCT08PW
74AHC08BQ 40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
SOT762-1
74AHCT08BQ
74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 14 November 2007 2 of 14
NXP Semiconductors
74AHC08; 74AHCT08
Quad 2-input AND gate
4. Functional diagram
5. Pinning information
5.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate)
mna222
1A
1B
1Y
2
1
3
2A
2B
2Y
5
4
6
3A
3B
3Y
10
9
8
4A
4B
4Y
13
12
11
mna223
3
&
&
&
&
2
1
6
5
4
8
10
9
11
13
12
mna221
A
B
Y
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14
08
1A V
CC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y
001aac945
1
2
3
4
5
6
7 8
10
9
12
11
14
13
001aac946
08
GND(1)
Transparent top view
2Y 3A
2B 3B
2A 4Y
1Y 4A
1B 4B
GND
3Y
1A
V
CC
6 9
5 10
4 11
3 12
2 13
7
8
1
14
terminal 1
index area

74AHC08PW,112

Mfr. #:
Manufacturer:
Nexperia
Description:
Logic Gates QUAD 2-INPUT AND
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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