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CAT28F020HI12

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
1
Doc. No. MD-1029, Rev. F© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
I/O
0
–I/O
7
I/O BUFFERS
CE, OE LOGIC
SENSE
AMP
DATA
LATCH
ERASE VOLTAGE
SWITCH
PROGRAM VOLTAGE
SWITCH
COMMAND
REGISTER
CE
OE
WE
VOLTAGE VERIFY
SWITCH
ADDRESS LATCH
Y-DECODER
X-DECODER
Y-GATING
2,097,152 BIT
MEMORY
ARRAY
A
0
–A
17
FEATURES
■ Fast read access time: 90/120 ns
■ Low power CMOS dissipation:
– Active: 30 mA max (CMOS/TTL levels)
– Standby: 1 mA max (TTL levels)
– Standby: 100 µA max (CMOS levels)
■ High speed programming:
– 10 µs per byte
– 4 seconds typical chip program
■ 0.5 seconds typical chip-erase
■ 12.0V ± 5% programming and erase voltage
■ Commercial, industrial and automotive
temperature ranges
■ Stop timer for program/erase
■ On-chip address and data latches
■ JEDEC standard pinouts:
– 32-pin DIP
– 32-pin PLCC
– 32-pin TSOP (8 x 20)
■ 100,000 program/erase cycles
■ 10 year data retention
■ Electronic signature
using a two write cycle scheme. Address and Data are
latched to free the I/O bus and address bus during the
write operation.
The CAT28F020 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
DESCRIPTION
The CAT28F020 is a high speed 256K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard
EPROM and E
2
PROM devices. Programming and
Erase are performed through an operation and verify
algorithm. The instructions are input via the I/O bus,
5115 FHD F02
BLOCK DIAGRAM
2 Megabit CMOS Flash Memory
CAT28F020
Licensed Intel
second source
CAT28F020
2
Doc. No. MD-1029, Rev. F
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
PIN FUNCTIONS
Pin Name Type Function
A
0
–A
17
Input Address Inputs for
memory addressing
I/O
0
–I/O
7
I/O Data Input/Output
CE Input Chip Enable
OE Input Output Enable
WE Input Write Enable
V
CC
Voltage Supply
V
SS
Ground
V
PP
Program/Erase
Voltage Supply
PIN CONFIGURATION
5115 FHD F01
TSOP Package (Standard Pinout) (T, H)
5115 FHD F14
TSOP Package (Reverse Pinout) (TR, HR)
I/O
0
I/O
1
I/O
2
V
SS
I/O
6
I/O
5
I/O
4
I/O
3
13
14
15
16
20
19
18
17
9
10
11
12
24
23
22
21
A
3
A
2
A
1
A
0
OE
A
10
CE
I/O
7
A
7
A
6
A
5
A
4
5
6
7
8
1
2
3
4
V
PP
A
16
A
15
A
12
A
13
A
8
A
9
A
11
28
27
26
25
32
31
30
29
V
CC
WE
A
17
A
14
A
7
A
6
A
5
A
4
5
6
7
8
A
3
A
2
A
1
A
0
9
10
11
12
I/O
0
13
A
14
A
13
A
8
A
9
29
28
27
26
A
11
OE
A
10
CE
25
24
23
22
I/O
7
21
I/O
1
I/O
2
V
SS
I/O
3
I/O
4
I/O
5
I/O
6
14 15 16 17 18 19 20
4321323130
A
12
A
15
A
16
V
PP
V
CC
WE
A
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
V
SS
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
12
A
15
A
16
V
PP
V
CC
WE
A
17
A
14
A
13
A
8
A
9
A
11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
V
SS
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
12
A
15
A
16
V
PP
V
CC
WE
A
17
A
14
A
13
A
8
A
9
A
11
PLCC Package (N, G)
DIP Package (L)
CAT28F020
3
Doc. No. MD-1029, Rev. F© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAPACITANCE T
A
= 25°C, f = 1.0 MHz
Symbol Test Conditions Min Typ Max Units
C
IN
(3)
Input Pin Capacitance V
IN
= 0V 6 pF
C
OUT
(3)
Output Pin Capacitance V
OUT
= 0V 10 pF
C
VPP
(3)
V
PP
Supply Capacitance V
PP
= 0V 25 pF
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. –45°C to +130°C
Storage Temperature....................... –65°C to +150°C
Voltage on Any Pin with
Respect to Ground
(1)
........... –2.0V to +V
CC
+ 2.0V
Voltage on Pin A
9
with
Respect to Ground
(1)
................... –2.0V to +13.5V
V
PP
with Respect to Ground
during Program/Erase
(1)
.............. –2.0V to +14.0V
V
CC
with Respect to Ground
(1)
............ –2.0V to +7.0V
Package Power Dissipation
Capability (T
A
= 25°C) .................................. 1.0 W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current
(2)
........................ 100 mA
RELIABILITY CHARACTERISTICS
Symbol Parameter Test Method Min Typ Max Units
N
END
(3)
Endurance MIL-STD-883, Test Method 1033 100K Cycles/Byte
T
DR
(3)
Data Retention MIL-STD-883, Test Method 1008 10 Years
V
ZAP
(3)
ESD Susceptibility MIL-STD-883, Test Method 3015 2000 Volts
I
LTH
(3)(4)
Latch-Up JEDEC Standard 17 100 mA
Note:
1. The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V
CC
+0.5V, which may overshoot to V
CC
+ 2.0V for periods of less than 20ns.
2. Output shorted for no more than one second. No more than one output shorted at a time.
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V
CC
+1V.
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of
the device at these or any other conditions outside of those
listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and
reliability.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

CAT28F020HI12

Mfr. #:
Buy CAT28F020HI12
Manufacturer:
ON Semiconductor
Description:
IC FLASH 2M PARALLEL 32TSOP
Lifecycle:
New from this manufacturer.
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