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CAT28F020HI12

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
CAT28F020
4
Doc. No. MD-1029, Rev. F
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
D.C. OPERATING CHARACTERISTICS
V
CC
= +5V ±10%, unless otherwise specified. (See Note 2)
Symbol Parameter Test Conditions Min Typ Max Unit
I
LI
Input Leakage Current V
IN
= V
CC
or V
SS
±1 µA
V
CC
= 5.5V, OE = V
IH
I
LO
Output Leakage Current V
OUT
= V
CC
or V
SS
, ±1 µA
V
CC
= 5.5V, OE = V
IH
I
SB1
V
CC
Standby Current CMOS CE = V
CC
±0.5V, 100 µA
V
CC
= 5.5V
I
SB2
V
CC
Standby Current TTL CE = V
IH
, V
CC
= 5.5V 1 mA
I
CC1
V
CC
Active Read Current V
CC
= 5.5V, CE = V
IL
,30mA
I
OUT
= 0mA, f = 6 MHz
I
CC2
(1)
V
CC
Programming Current V
CC
= 5.5V, 15 mA
Programming in Progress
I
CC3
(1)
V
CC
Erase Current V
CC
= 5.5V, 15 mA
Erasure in Progress
I
CC4
(1)
V
CC
Prog./Erase Verify Current V
CC
= 5.5V, Program or 15 mA
Erase Verify in Progress
I
PPS
V
PP
Standby Current V
PP
= V
PPL
±10 µA
I
PP1
V
PP
Read Current V
PP
= V
PPH
200 µA
I
PP2
(1)
V
PP
Programming Current V
PP
= V
PPH
,30mA
Programming in Progress
I
PP3
(1)
V
PP
Erase Current V
PP
= V
PPH
,30mA
Erasure in Progress
I
PP4
(1)
V
PP
Prog./Erase Verify Current V
PP
= V
PPH
, Program or 5 mA
Erase Verify in Progress
V
IL
Input Low Level TTL -0.5 0.8 V
V
ILC
Input Low Level CMOS -0.5 0.8 V
V
OL
Output Low Level I
OL
= 5.8mA, V
CC
(2)
= 4.5V 0.45 V
V
IH
Input High Level TTL 2 V
CC
+0.5 V
V
IHC
Input High Level CMOS V
CC
*0.7 V
CC
+0.5 V
V
OH1
Output High Level TTL I
OH
= -2.5mA, V
CC
(2)
= 4.5V 2.4 V
V
OH2
Output High Level CMOS I
OH
= -400µA, V
CC
(2)
= 4.5V V
CC
-0.4 V
V
ID
A
9
Signature Voltage A
9
= V
ID
11.4 13 V
I
ID
(1)
A
9
Signature Current A
9
= V
ID
200 µA
V
LO
V
CC
Erase/Prog. Lockout Voltage 2.5 V
Note:
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. CAT28F020-90, V
CCMIN
= 4.75 V.
CAT28F020
5
Doc. No. MD-1029, Rev. F© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
SUPPLY CHARACTERISTICS
Figure 1. A.C. Testing Input/Output Waveform
(3)(4)(5)
Testing Load Circuit (example)
A.C. CHARACTERISTICS, Read Operation
V
CC
= +5V ±10%, unless otherwise specified. (See Note 8)
JEDEC Standard 28F020-90
(7)
28F020-12
(7)
Symbol Symbol Parameter Min Typ Max Min Typ Max Unit
t
AVAV
t
RC
Read Cycle Time 90 120 ns
t
ELQV
t
CE
CE Access Time 90 120 ns
t
AVQV
t
ACC
Address Access Time 90 120 ns
t
GLQV
t
OE
OE Access Time 35 50 ns
t
AXQX
t
OH
Output Hold from Address OE/CE Change 0 0 ns
t
GLQX
t
OLZ
(1)(6)
OE to Output in Low-Z 0 0 ns
t
ELQX
t
LZ
(1)(6)
CE to Output in Low-Z 0 0 ns
t
GHQZ
t
DF
(1)(2)
OE High to Output High-Z 30 30 ns
t
EHQZ
t
DF
(1)(2)
CE High to Output High-Z 40 40 ns
t
WHGL
(1)
- Write Recovery Time Before Read 6 6 µs
1.3V
DEVICE
UNDER
TEST
1N914
3.3K
C
L
= 100 pF
OUT
C
L
INCLUDES JIG CAPACITANCE
INPUT PULSE LEVELS REFERENCE POINTS
2.0 V
0.8 V
2.4 V
0.45 V
Note:
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Output floating (High-Z) is defined as the state where the external data line is no longer driven by the output buffer.
3. Input Rise and Fall Times (10% to 90%) < 10 ns.
4. Input Pulse Levels = 0.45 V and 2.4 V. For High Speed Input Pulse Levels 0.0 V and 3.0 V.
5. Input and Output Timing Reference = 0.8 V and 2.0 V. For High Speed Input and Output Timing Reference = 1.5 V.
6. Low-Z is defined as the state where the external data may be driven by the output buffer but may not be valid.
7. For load and reference points, see Fig. 1.
8. CAT28F020-90, V
CCMIN
= 4.75 V.
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CCVegatloVylppuSCCV
09-020F8257.45.5V
21-020F825.45.5V
LPPVsnoitarepOdaeRgniruDPPV05.6V
HPPVmargorP/esarE/daeRgniruDPPV4.116.21V
CAT28F020
6
Doc. No. MD-1029, Rev. F
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
ERASE AND PROGRAMMING PERFORMANCE
(1)
28F020-90 28F020-12
Parameter Min Typ Max Min Typ Max Unit
Chip Erase Time
(3)(5)
0.5 10 0.5 10 sec
Chip Program Time
(3)(4)
4 25 4 25 sec
A.C. CHARACTERISTICS, Program/Erase Operation
V
CC
= +5V ±10%, unless otherwise specified. (See Note 6)
JEDEC
Standard
28F020-90 28F020-12
Symbol Symbol Parameter Min Typ Max Min Typ Max Unit
t
AVAV
t
WC
Write Cycle Time 90 120 ns
t
AVWL
t
AS
Address Setup Time 0 0 ns
t
WLAX
t
AH
Address Hold Time 40 40 ns
t
DVWH
t
DS
Data Setup Time 40 40 ns
t
WHDX
t
DH
Data Hold Time 10 10 ns
t
ELWL
t
CS
CE Setup Time 0 0 ns
t
WHEH
t
CH
CE Hold Time 0 0 ns
t
WLWH
t
WP
WE Pulse Width 40 40 ns
t
WHWL
t
WPH
WE High Pulse Width 20 20 ns
t
WHWH1
(2)
- Program Pulse Width 10 10 µs
t
WHWH2
(2)
- Erase Pulse Width 9.5 9.5 ms
t
WHGL
- Write Recovery Time Before Read 6 6 µs
t
GHWL
- Read Recovery Time Before Write 0 0 µs
t
VPEL
-V
PP
Setup Time to CE 100 100 ns
Note:
1. Please refer to Supply characteristics for the value of V
PPH
and V
PPL
. The V
PP
supply can be either hardwired or switched. If V
PP
is switched,
V
PPL
can be ground, less than V
CC
+ 2.0V or a no connect with a resistor tied to ground.
2. Program and Erase operations are controlled by internal stop timers.
3. ‘Typicals’ are not guaranteed, but based on characterization data. Data taken at 25°C, 12.0V V
PP
.
4. Minimum byte programming time (excluding system overhead) is 16 µs (10 µs program + 6 µs write recovery), while maximum is 400 µs/
byte (16 µs x 25 loops). Max chip programming time is specified lower than the worst case allowed by the programming algorithm since
most bytes program significantly faster than the worst case byte.
5. Excludes 00H Programming prior to Erasure.
6. CAT28F020-90, V
CCMIN
= 4.75 V
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

CAT28F020HI12

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Manufacturer:
ON Semiconductor
Description:
IC FLASH 2M PARALLEL 32TSOP
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