External fields can cause interference leading to false
detections or sensitivity shifts. Most fields come from AC
power sources. RFI noise sources are heavily suppressed
by the low impedance nature of the QT circuitry itself.
Noise such as from 50Hz or 60Hz fields becomes a
problem if it is uncorrelated with acquisition signal
sampling; uncorrelated noise can cause aliasing effects in
the key signals. To suppress this problem the WS input
allows bursts to synchronize to the noise source. This
same input can also be used to wake the part from a
low-power Sleep state.
The noise sync operating mode is set by parameter
MSYNC in Setups.
The sync occurs only at the burst for key 0 (X0Y0); the
device waits for the sync signal for up to 100ms after the
end of a preceding full matrix scan, then when a negative
sync edge is received, the matrix is scanned in its entirety
again.
The sync signal drive should be a buffered logic signal, or
perhaps a diode-clamped signal, but never a raw AC signal
from the mains.
Since Noise sync is highly effective yet simple and
inexpensive to implement, it is strongly advised to take
advantage of it anywhere there is a possibility of
encountering electric fields. Quantum’s QmBtn software
can show signal noise caused by nearby AC electric fields
and will hence assist in determining the need to make use
of this feature.
If the sync feature is enabled but no sync signal exists, the
sensor will continue to operate but with a delay of 100ms
from the end of one scan to the start of the next, and
hence will have a slow response time.
MSYNC Default value: 0 (Off)
5.13 Burst Spacing - BS
The interval of time from the start of one burst to the start
of the next is known as the burst spacing. This is an
alterable parameter which affects all keys. The burst
spacing can be viewed as a scheduled timeslot in which a
burst occurs. This approach results in an orderly and
predictable sequencing of key scanning with predictable
response times.
Shorter spacings result in a faster response time to touch;
longer spacings permit higher burst lengths and longer
conversion times but slow down response time.
An automatic setting is also available that performs a ‘best
fit’ timeslot determination for each key’s acquisition burst.
The fit is determined on power-up each time and is fixed
thereafter until reset again.
Standard BS settings from 500µs to 3ms are available.
BS Default value: 0 (Automatic)
5.14 Serial Rate - SR
The possible Baud rates are shown in Section 6.5. The
rate chosen by this parameter only affects UART mode.
SPI mode is slave-only and can clock at any rate from DC
up to 4Mhz.
The Baud rate can be adjusted to one of 5 values from
9600 to 115.2K baud.
SR Default value: 0 (9600 Baud)
5.15 Lower Signal Limit - LSL
This Setup determines the lowest acceptable value of
signal level for all keys. If any key’s reference level falls
below this value, the device declares an error condition.
Testing is required to ensure that there are adequate
margins in this determination. Key size, shape, panel
material, burst length, and dwell time all factor into the
detected signal levels.
LSL Default value: 100
5.16 LED / Alert Output - LED
Refer to Section 6.3 for details.
Pin 40 is designed to drive a low-current LED or to be used
as a status and error signalling mechanism for the host
controller, primarily for FMEA purposes.
One use for this pin is to alert the host that there is key
activity, in order to limit the amount of communication
between the device and the host. The LED pin should
ideally be connected to an interrupt pin on the host that
can detect a negative edge, following which the host can
proceed to poll the device for key activations.
The table in Section 6.3 shows the possible internal
conditions that can cause the LED pin to go active. In
addition the LED pin can be made active high or active
low. The various items in the table are logical-OR’d
together. The LED pin can even be used as a watchdog for
the host, to reset it should the host fail to send regular
transmissions to the QT (bit 0 of LSL byte).
Note that the LED state will be preserved during sleep.
LED Default value: 0x6c
(see Section 6.3 for details)
5.17 Host CRC - HCRC
The setups block terminates with a 16-bit CRC, HCRC, of
the entire block. The formulae for calculating this CRC and
the 8-bit CRC also used in the device are shown in Section
8.
lQ
16 QT60486-AS 0.07/1103
Advanced information; subject to change
