ACS110-7SN/SB2
7/10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
T (°C)
j
I
GT
I& I
LH
I , I , I [T ] / I , I , I [T = 25°C]
GTHL j GTHL j
Fig. 4: Relative variation of gate trigger current,
holding current and latching versus junction
temperature (typical values).
0
1
2
3
4
5
6
7
8
25 50 75 100 125
T (°C)
j
dV/dt [T ] / dV/dt [T = 125°C]
jj
V
OUT
=460V
Fig. 5: Relative variation of static dV/dt versus
junction temperature.
0
1
2
3
4
5
6
7
8
9
10
1 10 100 1000
Number of cycles
Non repetitive
T initial=25°C
j
Repetitive
T =105°C
ab
I (A)
TSM
t=20ms
Fig. 8: Surge peak on-state current versus number
of cycles.
(dI/dt) [(dV/dt) ] / Specified (dI/dt)
cc c
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0 5 10 15 20 25 30 35 40 45 50
(dV/dt) (V/µs)
c
V
OUT
=400V
Fig. 6: Relative variation of critical rate of de-
crease of main current versus reapplied dV/dt
(typical values).
0.1
1.0
10.0
100.0
0.01 0.10 1.00 10.00
t (ms)
p
I
TSM
I²t
I (A), I²t (A²s)
TSM
T initial=25°C
j
Fig. 9: Non repetitive surge peak on-state current
for a sinusoidal pulse with width tp < 10ms, and
corresponding value of I²t.
(dI/dt) [Tj] / (dI/dt) [T = 125°C]
ccj
0
2
4
6
8
10
12
14
16
18
20
25 50 75 100 125
T (°C)
j
V
OUT
=400V
Fig. 7: Relative variation of critical rate of decrease
of main current versus junction temperature.
