DS1085L
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Table 2. DEVICE MODE USING OUT0
EN0
(BIT)
SEL0
(BIT)
PDN0
(BIT)
CTRL0
(PIN)
OUT0
(PIN)
CTRL0
FUNCTION
DEVICE
MODE
1 High-Z Power-Down***
0 0 0
0 High-Z
Power-Down*
Active
1 MCLK/M
0 1 0
0 MCLK
Mux Select
Active
1 High-Z
1 0 0
0 MCLK
Output Enable
Active
1 High-Z
1 1 0
0 MCLK/M
Output Enable
Active**
1 High-Z Power-Down
X 0 1
0 MCLK
Power-Down
Active
1 High-Z Power-Down
X 1 1
0 MCLK/M
Power-Down
Active
* This mode is for applications where OUT0 is not used, but CTRL0 is used as a device shutdown.
** Factory default setting.
***See standby (power-down) current specification for power-down current range.
Table 3. DEVICE MODE USING OUT1
PDN1
(BIT)
CTRL1
(PIN)
CTRL1
FUNCTION
OUT1 (PIN) DEVICE MODE
0 0 OUT CLK
0 1
Output Enable
High-Z
Active*
1 0 OUT CLK Active
1 1
Power-Down
High-Z Power-Down
*Factory default setting
NOTE:
Both CTRL0 and CTRL1 can be configured as power-downs. They are internally “OR” connected so
either of the control pins can be used to provide a power-down function for the whole device, subject to
appropriate settings of the PDN0 and PDN1 register bits (see Table 4).
Table 4. SHUTDOWN CONTROL WITH PDN0 AND PDN1
PDN0
(BIT)
PDN1
(BIT)
SHUTDOWN CONTROL
0 0 NONE
0 1 CTRL1
1 0 CTRL0
1 1 CTRL1 OR CTRL0
DS1085L
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REGISTER FUNCTIONS
The user-programmable registers can be used to determine the mode of operation (MUX), operating
frequency (DAC, OFFSET, DIV), and bus settings (ADDR). The functions of the registers are described
in this section, but the details of how these registers are programmed can be found in a later section. The
register settings are nonvolatile, with the values being stored automatically or as required in EEPROM
when the registers are programmed through the SDA and SCL pins.
DAC WORD (Address 08h)
MSB LSB MSB LSB
d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X
First Data Byte Second Data Byte
X = Don’t care.
The DAC word (d0–d9) controls the frequency of the master oscillator. The resolution of this register
depends on the step size of the device. The absolute frequency of the device also depends on the value of
the OFFSET register (see Tables 5 and 6).
Table 5. DEVICE DEFAULT SETTINGS
DS1085LZ-5
DS1085LZ-12 DS1085LZ-25
Frequency DAC Offset Frequency DAC Offset Frequency DAC Offset
48.58MHz 500 OS 52.3MHz 600 OS 50.9MHz 500 OS
For any given value of OFFSET the master oscillator frequency can be derived as follows:
Frequency = Min Frequency + DAC x Step Size
where: Min frequency is the lowest frequency shown in Table 6 for the corresponding offset.
DAC is the value of the DAC register (0–1023).
Step size is the step size of the device (5kHz, 12.5kHz, or 25kHz).
OS is the decimal, integer value of the 5 MSBs of the RANGE register.
OFFSET BYTE (Address 0Eh)
MSB LSB
X X X O4 O3 O2 O1 O0
X = Don’t care.
The OFFSET byte (O0–O4) determines the range of frequencies that can be obtained within the absolute
minimum and maximum range of the oscillator. Correct operation of the device is not guaranteed for
values of OFFSET not shown in Table 6.
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Table 6. FREQUENCY vs. OFFSET
DS1085LZ-5 DS1085LZ-12 DS1085LZ-25
OFFSET
FREQUENCY
RANGE
FREQUENCY
RANGE
FREQUENCY
RANGE
OS - 10
— —
OS - 9
— —
OS - 8
OS - 7
OS - 6 30.7 to 35.8 25.6 to 38.4 19.2 to 44.8
OS - 5 33.3 to 38.4 28.8 to 41.6 22.4 to 48.0
OS - 4 35.8 to 41.0 32.0 to 44.8 25.6 to 51.2
OS - 3 38.4 to 43.5 35.2 to 48.0 28.8 to 54.4
OS - 2 41.0 to 46.1 38.4 to 51.2 32.0 to 57.6
OS - 1 43.5 to 48.6 41.6 to 54.4 35.2 to 60.8
OS* 46.1 to 51.2 44.8 to 57.6 38.4 to 64.0
OS + 1 48.6 to 53.8 48.0 to 60.8 41.6 to 67.2
OS + 2 51.2 to 56.3 51.2 to 64.0 44.8 to 70.4
OS + 3 53.8 to 58.9 54.4 to 67.2 48.0 to 73.6
OS + 4 56.3 to 61.4 57.6 to 70.4 51.2 to 76.8
OS + 5 58.9 to 64.0 60.8 to 73.6 54.4 to 80.0
OS + 6 61.4 to 66.6 64.0 to 76.8 57.6 to 83.2
*OS is the OFFSET default setting. OS is the integer value of the five MSBs of RANGE register.
These ranges include values outside the oscillator range of 33MHz to 66MHz. When using these ranges,
values of DAC must be chosen to keep the oscillator within range. Correct operation of the device is not
guaranteed outside the range 33MHz to 66MHz.
MUX WORD (Address 02h)
The MUX word controls several functions. Its bits are organized as follows:
MSB LSB MSB LSB
NAME *
PDN1 PDN0
SEL0 EN0 0M1 0M0 1M1 1M0 DIV1
Default
Setting
0 0 0 1 1 0 0 0 0 0 X X XXXX
* This bit must be set to zero.
X = Don’t care.

DS1085LZ-25B2+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Programmable Oscillators 3.3V EconOscillator f Synthesizer
Lifecycle:
New from this manufacturer.
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