Nexperia
74AUP1G175-Q100
Low-power D-type flip-flop with reset; positive-edge trigger
74AUP1G175_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 2 — 10 March 2017
10 / 17
25 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ
[1]
Max Min Max
(85 °C)
Max
(125 °C)
Unit
CP to Q; see Figure 5
[2]
V
CC
= 0.8 V - 38.4 - - - - ns
V
CC
= 1.1 V to 1.3 V 3.6 9.8 19.5 3.4 20.6 21.0 ns
V
CC
= 1.4 V to 1.6 V 3.3 6.9 11.2 3.2 12.4 13.0 ns
V
CC
= 1.65 V to 1.95 V 3.1 5.7 8.8 2.9 9.6 10.2 ns
V
CC
= 2.3 V to 2.7 V 3.0 4.6 6.4 2.6 6.9 7.3 ns
V
CC
= 3.0 V to 3.6 V 2.8 4.2 5.7 2.5 6.5 6.9 ns
MR to Q; see Figure 6
[2]
V
CC
= 0.8 V - 35.1 - - - - ns
V
CC
= 1.1 V to 1.3 V 3.9 9.3 18.0 3.7 18.6 19.8 ns
V
CC
= 1.4 V to 1.6 V 3.9 6.6 8.9 3.6 11.6 12.2 ns
V
CC
= 1.65 V to 1.95 V 3.6 5.6 8.6 3.4 9.6 9.7 ns
V
CC
= 2.3 V to 2.7 V 3.5 4.8 6.4 2.9 7.2 7.2 ns
t
pd
propagation delay
V
CC
= 3.0 V to 3.6 V 3.3 4.6 5.7 3.1 6.4 6.9 ns
CP; see Figure 5
V
CC
= 0.8 V - 35 - - - - MHz
V
CC
= 1.1 V to 1.3 V - 130 - 70 - - MHz
V
CC
= 1.4 V to 1.6 V - 200 - 120 - - MHz
V
CC
= 1.65 V to 1.95 V - 240 - 150 - - MHz
V
CC
= 2.3 V to 2.7 V - 275 - 190 - - MHz
f
max
maximum
frequency
V
CC
= 3.0 V to 3.6 V - 300 - 200 - - MHz
C
L
= 5 pF, 10 pF, 15 pF and 30 pF
CP; HIGH or LOW;
see Figure 5
V
CC
= 0.8 V - 5.25 - - - - ns
V
CC
= 1.1 V to 1.3 V - 1.6 - 1.5 - - ns
V
CC
= 1.4 V to 1.6 V - 1.0 - 0.9 - - ns
V
CC
= 1.65 V to 1.95 V - 0.75 - 0.7 - - ns
V
CC
= 2.3 V to 2.7 V - 0.6 - 0.4 - - ns
V
CC
= 3.0 V to 3.6 V - 0.55 - 0.4 - - ns
MR; LOW; see Figure 6
V
CC
= 0.8 V - 9.0 - - - - ns
V
CC
= 1.1 V to 1.3 V - 3.0 - 4.9 - - ns
V
CC
= 1.4 V to 1.6 V - 1.75 - 2.5 - - ns
t
W
pulse width
V
CC
= 1.65 V to 1.95 V - 1.35 - 1.8 - - ns
Nexperia
74AUP1G175-Q100
Low-power D-type flip-flop with reset; positive-edge trigger
74AUP1G175_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 2 — 10 March 2017
11 / 17
25 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ
[1]
Max Min Max
(85 °C)
Max
(125 °C)
Unit
V
CC
= 2.3 V to 2.7 V - 0.9 - 1.1 - - ns
V
CC
= 3.0 V to 3.6 V - 0.8 - 0.8 - - ns
MR; see Figure 6
V
CC
= 0.8 V - - - - - - ns
V
CC
= 1.1 V to 1.3 V - -1.1 - -1.2 - - ns
V
CC
= 1.4 V to 1.6 V - -2.0 - -0.8 - - ns
V
CC
= 1.65 V to 1.95 V - -0.5 - -0.7 - - ns
V
CC
= 2.3 V to 2.7 V - -0.9 - -0.4 - - ns
t
rec
recovery time
V
CC
= 3.0 V to 3.6 V - -1.0 - -0.2 - - ns
D to CP; see Figure 5
V
CC
= 0.8 V - - - - - - ns
V
CC
= 1.1 V to 1.3 V - 0.5 - 1.2 - - ns
V
CC
= 1.4 V to 1.6 V - 0.4 - 0.8 - - ns
V
CC
= 1.65 V to 1.95 V - 0.3 - 0.6 - - ns
V
CC
= 2.3 V to 2.7 V - 0.3 - 0.5 - - ns
t
su(H)
set-up time HIGH
V
CC
= 3.0 V to 3.6 V - 0.2 - 0.5 - - ns
D to CP; see Figure 5
V
CC
= 0.8 V - - - - - - ns
V
CC
= 1.1 V to 1.3 V - 0.8 - 1.7 - - ns
V
CC
= 1.4 V to 1.6 V - 0.6 - 1.1 - - ns
V
CC
= 1.65 V to 1.95 V - 0.4 - 0.9 - - ns
V
CC
= 2.3 V to 2.7 V - 0.4 - 0.9 - - ns
t
su(L)
set-up time LOW
V
CC
= 3.0 V to 3.6 V - 0.5 - 0.9 - - ns
D to CP; see Figure 5
V
CC
= 0.8 V - - - - - - ns
V
CC
= 1.1 V to 1.3 V - -0.7 - 0.2 - - ns
V
CC
= 1.4 V to 1.6 V - -0.5 - 0 - - ns
V
CC
= 1.65 V to 1.95 V - -0.5 - 0 - - ns
V
CC
= 2.3 V to 2.7 V - -0.3 - 0 - - ns
t
h
hold time
V
CC
= 3.0 V to 3.6 V - -0.4 - 0 - - ns
f
i
= 1 MHz;
V
I
= GND to V
CC
[3]
V
CC
= 0.8 V - 1.6 - - - - pF
V
CC
= 1.1 V to 1.3 V - 1.7 - - - - pF
C
PD
power dissipation
capacitance
V
CC
= 1.4 V to 1.6 V - 1.8 - - - - pF
Nexperia
74AUP1G175-Q100
Low-power D-type flip-flop with reset; positive-edge trigger
74AUP1G175_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 2 — 10 March 2017
12 / 17
25 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ
[1]
Max Min Max
(85 °C)
Max
(125 °C)
Unit
V
CC
= 1.65 V to 1.95 V - 1.9 - - - - pF
V
CC
= 2.3 V to 2.7 V - 2.2 - - - - pF
V
CC
= 3.0 V to 3.6 V - 2.7 - - - - pF
[1] All typical values are measured at nominal V
CC
.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in μW).
P
D
= C
PD
× V
CC
2
× f
i
× N + Σ(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
× V
CC
2
× f
o
) = sum of the outputs.
11.1 Waveforms and test circuit
001aaa465
t
h
t
su
t
h
t
PHL
t
W
t
PLH
t
su
1/f
max
V
M
V
M
V
M
V
I
GND
V
I
GND
CP input
D input
V
OH
V
OL
Q output
Measurement points are given in Table 9.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Figure 5. The clock input (CP) to output (Q) propagation delays, the clock pulse width, the D to CP set-up, the CP
to D hold times and the maximum input clock frequency

74AUP1G175GW-Q100H

Mfr. #:
Manufacturer:
Nexperia
Description:
Flip Flops 74AUP1G175GW-Q100/SC-88/REEL 7
Lifecycle:
New from this manufacturer.
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