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TFDU4300-TT3

P1-P3P4-P6P7-P9P10-P12P13-P13
TFDU4300
Document Number 82614
Rev. 1.8, 19-Feb-09
Vishay Semiconductors
www.vishay.com
207
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Electrical Characteristics
Transceiver
Tested at T
amb
= 25 °C, V
CC1
= V
CC2
= 2.7 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Notes:
(1)
Standard illuminant A.
(2)
To provide an improved immunity with increasing V
logic
the typical threshold level is increasing with V
logic
and set to 0.5 x V
logic
. It is
recommended to use the specified min/max values to avoid increased operating current.
Parameter Test conditions Symbol Min. Typ. Max. Unit
Supply voltage
Remark: For 2.4 V < V
CC1
< 2.6 V at T
amb
< - 25 °C a minor
reduction of the receiver sensitivity
may occur
V
CC1
2.4 5.5 V
Idle supply current at V
CC1
(receive mode, no signal)
SD = low, E
e
= 1 klx
(1)
,
T
amb
= - 25 °C to + 85 °C,
V
CC1
= V
CC2
= 2.7 V to 5.5 V
I
CC1
90 130 µA
SD = low, E
e
= 1 klx
(1)
,
T
amb
= 25 °C,
V
CC1
= V
CC2
= 2.7 V to 5.5 V
I
CC1
75 µA
Idle supply current at V
logic
(receive mode, no signal)
SD = low, E
e
= 1 klx
(1)
, V
log
,
pin 7, no signal, no load at RXD
I
log
1µA
Average dynamic supply
current, transmitting
I
IRED
= 300 mA, 20 % Duty Cycle I
CC1
0.65 mA
Standby supply current
SD = high, T = 25 °C, E
e
= 0 klx I
SD
0.1 µA
SD = high, T = 70 °C I
SD
2µA
SD = high, T = 85 °C I
SD
3µA
Standby supply current, V
logic
no signal, no load I
log
1µA
Operating temperature range T
A
- 30 + 85 °C
Output voltage low, RXD
C
Load
= 15 pF V
OL
- 0.5
0.15 x V
logic
V
Output voltage high, RXD
I
OH
= - 500 µA V
OH
0.8 x V
logic
V
logic
+ 0.5
V
I
OH
= - 250 µA, C
Load
= 15 pF V
OH
0.9 x V
logic
V
logic
+ 0.5
V
RXD to V
CC1
impedance R
RXD
400 500 600 kΩ
Input voltage low (TXD, SD) V
IL
- 0.5 0.5 V
Input voltage high (TXD, SD)
CMOS level
(2)
, V
logic
≥ 2.5 V
V
IH
V
logic
- 0.5
6V
Input voltage high (TXD, SD)
CMOS level
(2)
, V
logic
< 2.5 V
V
IH
0.8 x V
logic
6V
Input leakage current (TXD, SD)
V
IN
= 0.9 x V
logic
I
ICH
- 2 + 2 µA
Controlled pull down current
SD, TXD = "0" to "1",
V
IN
< 0.15 V
logic
I
IRTx
+ 150 µA
SD, TXD = "0" to "1",
V
IN
> 0.7 V
logic
I
IRTx
- 1 0 1 µA
Input capacitance (TXD, SD)
C
IN
5pF
www.vishay.com
208
Document Number 82614
Rev. 1.8, 19-Feb-09
TFDU4300
Vishay Semiconductors
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Optoelectronic Characteristics
Receiver
Tested at T
amb
= 25 °C, V
CC1
= V
CC2
= 2.7 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Notes:
(1)
Equivalent to IrDA background light and electromagnetic field test: fluorescent lighting immunity.
(2)
IrDA sensitivity definition: minimum irradiance E
e
in angular range, power per unit area. The receiver must meet the BER specification
while the source is operating at the minimum intensity in angular range into the minimum half-angular range at the maximum link length.
(3)
Maximum irradiance E
e
in angular range, power per unit area. The optical delivered to the detector by a source operating at the
maximum intensity in angular range at minimum link length must not cause receiver overdrive distortion and possible related link errors.
If placed at the active output interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER). For more
definitions see the document “Symbols and Terminology” on the Vishay website.
Transmitter
Tested at T
amb
= 25 °C, V
CC1
= V
CC2
= 2.7 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Notes:
(1)
Using an external current limiting resistor is allowed and recommended to reduce IRED intensity and operating current when current
reduction is intended to operate at the IrDA low power conditions. E.g. for V
CC2
= 3.3 V a current limiting resistor of R
S
= 56 Ω will allow
a power minimized operation at IrDA low power conditions.
(2)
Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for the
standard remote control applications with codes as e.g. Phillips RC5/RC6
®
or RECS 80.
Parameter Test conditions Symbol Min. Typ. Max. Unit
Minimum irradiance E
e
in
angular range
(2)
9.6 kbit/s to 115.2 kbit/s
λ = 850 nm to 900 nm; α = 0°, 15°
E
e
40
(4)
80
(8)
mW/m
2
(µW/cm
2
)
Maximum Irradiance E
e
In
Angular Range
(3)
λ = 850 nm to 900 nm E
e
5
(500)
kW/m
2
(mW/cm
2
)
Maximum no detection
irradiance
(1)
λ = 850 nm to 900 nm
t
r
, t
f
< 40 ns,
t
po
= 1.6 µs at f = 115 kHz,
no output signal allowed
E
e
4
(0.4)
mW/m
2
(µW/cm
2)
Rise time of output signal 10 % to 90 %, C
L
= 15 pF t
r(RXD)
20 100 ns
Fall time of output signal 90 % to 10 %, C
L
= 15 pF t
f(RXD)
20 100 ns
RXD pulse width of output signal input pulse length > 1.2 µs t
PW
1.65 2.0 3.0 µs
Stochastic jitter, leading edge
input irradiance = 100 mW/m
2
,
≤ 115.2 kbit/s
250 ns
Standby/shutdown delay,
receiver startup time
after shutdown active or
power-on
150 µs
Latency t
L
100 150 µs
Parameter Test conditions Symbol Min. Ty p. Max. Unit
IRED operating current limitation
No external resistor for current limitation
(1)
I
D
250 300 350 mA
Forward voltage of built-in IRED I
f
= 300 mA V
f
1.4 1.8 1.9 V
Output leakage IRED current TXD = 0 V, 0 < V
CC1
< 5.5 V I
IRED
- 1 1 µA
Output radiant intensity
α = 0°, 15°
TXD = high, SD = low
I
e
30 65
mW/
sr
V
CC1
= 5.0 V, α = 0°, 15°
TXD = low or SD = high
(Receiver is inactive as long as
SD = high)
I
e
0.04
mW/
sr
Output radiant intensity, angle of
half intensity
α ± 24 °
Peak - emission wavelength
(2)
λ
p
880 900 nm
Spectral bandwidth Δλ 45 nm
Optical rise time, fall time t
ropt
, t
fopt
100 ns
Optical output pulse duration
input pulse width 1.6 < t
TXD
< 20 µs t
opt
t
TXD
- 0.15 t
TXD
+ 0.15 µs
input pulse width t
TXD
≥ 20 µs t
opt
20 300 µs
Optical overshoot 25 %
TFDU4300
Document Number 82614
Rev. 1.8, 19-Feb-09
Vishay Semiconductors
www.vishay.com
209
For technical questions within your region, please contact one of the following:
irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
Recommended Circuit Diagram
Operated with a clean low impedance power supply
the TFDU4300 needs no additional external
components. However, depending on the entire
system design and board layout, additional
components may be required (see figure 1).
*) R1 is optional when reduced intensity is used
The capacitor C1 is buffering the supply voltage and
eliminates the inductance of the power supply line.
This one should be a Tantalum or other fast capacitor
to guarantee the fast rise time of the IRED current.
The resistor R1 is the current limiting resistor, which
may be used to reduce the operating current to levels
below the specified controlled values for saving
battery power.
Vishay’s transceivers integrate a sensitive receiver
and a built-in power driver. The combination of both
needs a careful circuit board layout. The use of thin,
long, resistive and inductive wiring should be avoided.
The shutdown input must be grounded for normal
operation, also when the shutdown function is not
used.
Table 1.
Recommended Application Circuit
Components
The inputs (TXD, SD) and the output RXD should be
directly connected (DC - coupled) to the I/O circuit.
The capacitor C2 combined with the resistor R2 is the
low pass filter for smoothing the supply voltage.
R2, C1 and C2 are optional and dependent on the
quality of the supply voltages VCC1 and injected
noise. An unstable power supply with dropping
voltage during transmision may reduce the sensitivity
(and transmission range) of the transceiver.
The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to
the transceiver pins.
When extended wiring is used as in bench tests the
inductance of the power supply can cause
dynamically a voltage drop at VCC2. Often some
power supplies are not able to follow the fast current
rise time. In that case another 4.7 µF (type, see table
under C1) at VCC2 will be helpful.
Under extreme EMI conditions as placing an
RF-transmitter antenna on top of the transceiver, we
recommend to protect all inputs by a low-pass filter,
as a minimum a 12 pF capacitor, especially at the
RXD port. The transceiver itself withstands EMI at a
GSM frequencies above 500 V/m. When interference
is observed, the wiring to the inputs picks it up. It is
verified by DPI measurements that as long as the
interfering RF - voltage is below the logic threshold
levels of the inputs and equivalent levels at the
outputs no interferences are expected.
One should keep in mind that basic RF - design rules
for circuits design should be taken into account.
Especially longer signal lines should not be used
without termination. See e.g. “The Art of Electronics”
Paul Horowitz, Winfield Hill, 1989, Cambridge
University Press, ISBN: 0521370957.
Figure 1. Recommended Application Circuit
19295
V
IRED
V
CC
GND
V
logic
SD
TXD
RXD
V
CC2
, IRED A
V
CC1
Ground
V
logic
SD
TXD
RXD
IRED C
R2
R1*)
C1
C2
Component Recommended value Vishay part number
C1 4.7 µF, 16 V 293D 475X9 016B
C2 0.1 µF, Ceramic VJ 1206 Y 104 J XXMT
R1 depends on current to
be adjusted
R2 47 Ω, 0.125 W CRCW-1206-47R0-F-RT1
P1-P3P4-P6P7-P9P10-P12P13-P13

TFDU4300-TT3

Mfr. #:
Buy TFDU4300-TT3
Manufacturer:
Vishay Semiconductors
Description:
Infrared Transceivers SIR 115.2 kbits/s 2.4-5.5V Op Voltage
Lifecycle:
New from this manufacturer.
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