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ESD8008MUTAG

P1-P3P4-P6P7-P9
© Semiconductor Components Industries, LLC, 2015
February, 2015 − Rev. 4
1 Publication Order Number:
ESD8008/D
ESD8008
ESD Protection Diode
Low Capacitance Array for High Speed
Data Lines
The ESD8008 is designed specifically to protect four high speed
differential pairs. Ultra−low capacitance and low ESD clamping
voltage make this device an ideal solution for protecting voltage
sensitive high speed data lines. The flow−through style package
allows for easy PCB layout and matched trace lengths necessary to
maintain consistent impedance for the high speed lines.
Features
• Integrated 4 Pairs (8 Lines) High Speed Data
• Single Connect, Flow through Routing
• Low Capacitance (0.35 pF Max, I/O to GND)
• Protection for the Following IEC Standards:
IEC 61000−4−2 Level 4 (ESD) ±15 kV (Contact)
IEC 61000−4−5 (Lightning) 5 A (8/20 ms)
• UL Flammability Rating of 94 V−0
• SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• V−by−One HS
• LVDS
• Display Port
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Rating
Symbol Value Unit
Operating Junction Temperature Range T
J
−55 to +125 °C
Storage Temperature Range T
stg
−55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
T
L
260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ESD
ESD
±15
±15
kV
kV
Maximum Peak Pulse Current
8/20 ms @ T
A
= 25°C (I/O−GND)
I
PP
5.0 A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
See Application Note AND8308/D for further description of
survivability specs.
MARKING
DIAGRAM
Device Package Shipping
ORDERING INFORMATION
UDFN14
CASE 517CN
www.onsemi.com
ESD8008MUTAG UDFN14
(Pb−Free)
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
8008 = Specific Device Code
M = Date Code
G = Pb−Free Package
8008M
G
1
14
SZESD8008MUTAG UDFN14
(Pb−Free)
3000 / Tape &
Reel
ESD8008
www.onsemi.com
2
I/O
Figure 1. Pin Schematic
Figure 2. Pin Configuration
Note: Only minimum of one pin needs to be connected to
ground for functionality of all pins.
I/O
Pin 1
I/O
Pin 2
I/O
Pin 4
I/O
Pin 5
I/O
Pin 7
I/O
Pin 8
I/O
Pin 10
I/O
Pin 11
Center Pins, Pin 3, 6, 9, 12, 13, 14
Note: Common GND − Only Minimum of 1 GND connection required
GND
GND
GND
I/O
GND
I/O
I/O
GND
I/O
I/O
GND
I/O
I/O
=
1
2
3
4
5
6
7
8
9
10
11
14
13
12
ESD8008
www.onsemi.com
3
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol Parameter
V
RWM
Working Peak Voltage
I
R
Maximum Reverse Leakage Current @ V
RWM
V
BR
Breakdown Voltage @ I
T
I
T
Test Current
V
HOLD
Holding Reverse Voltage
I
HOLD
Holding Reverse Current
R
DYN
Dynamic Resistance
I
PP
Maximum Peak Pulse Current
V
C
Clamping Voltage @ I
PP
V
C
= V
HOLD
+ (I
PP
* R
DYN
)
I
V
V
C
V
RWM
V
HOLD
V
BR
R
DYN
V
C
I
R
I
T
I
HOLD
−I
PP
R
DYN
I
PP
V
C
= V
HOLD
+ (I
PP
* R
DYN
)
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise specified)
Parameter
Symbol Conditions Min Typ Max Unit
Reverse Working Voltage V
RWM
I/O Pin to GND 3.3 V
Breakdown Voltage V
BR
I
T
= 1 mA, I/O Pin to GND 5.5 7.0 8.5 V
Reverse Leakage Current I
R
V
RWM
= 3.3 V, I/O Pin to GND 0.5
mA
Holding Reverse Voltage V
HOLD
I/O Pin to GND 1.19 V
Holding Reverse Current I
HOLD
I/O Pin to GND 25 mA
Clamping Voltage (Note 1) V
C
IEC61000−4−2, ±8 KV Contact See Figures 3 and 4 V
Clamping Voltage V
C
I
PP
= 1 A, Any I/O to GND (8/20 ms pulse)
1.5 V
Clamping Voltage V
C
I
PP
= 5 A, Any I/O to GND (8/20 ms pulse)
5.0 V
Clamping Voltage
TLP (Note 2)
See Figures 7 through 10
V
C
I
PP
= 8 A
I
PP
= −8 A
IEC 61000−4−2 Level 2 equivalent
(±4 kV Contact, ±4 kV Air)
4.6
−5.1
V
I
PP
= 16 A
I
PP
= −16 A
IEC 61000−4−2 Level 4 equivalent
(±8 kV Contact, ±15 kV Air)
8.1
−10.3
Dynamic Resistance R
DYN
I/O Pin to GND
GND to I/O Pin
0.43
0.50
W
Junction Capacitance C
J
V
R
= 0 V, f = 1 MHz between I/O Pins and GND
V
R
= 0 V, f = 2.5 GHz between I/O Pins and GND
V
R
= 0 V, f = 5.0 GHz between I/O Pins and GND
V
R
= 0 V, f = 1 MHz, between I/O Pins
0.30
0.20
0.20
0.10
0.35
0.16
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. For test procedure see Figures 5 and 6 and application note AND8307/D.
2. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z
0
= 50 W, t
p
= 100 ns, t
r
= 4 ns, averaging window; t
1
= 30 ns to t
2
= 60 ns.
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−20 0 20 40 60 80 100 140120
Figure 3. IEC61000−4−2 +8 kV Contact ESD
Clamping Voltage
Figure 4. IEC61000−4−2 −8 kV Contact
Clamping Voltage
−20 0 20 40 60 80 100 140120
90
TIME (ns) TIME (ns)
VOLTAGE (V)
VOLTAGE (V)
80
70
60
50
40
30
20
10
0
−10
P1-P3P4-P6P7-P9

ESD8008MUTAG

Mfr. #:
Buy ESD8008MUTAG
Manufacturer:
ON Semiconductor
Description:
TVS Diodes / ESD Suppressors LOW CAP ESD PROTECTION
Lifecycle:
New from this manufacturer.
Delivery:
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