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DDF18C64_128x72.fm - Rev. F 9/08 EN
11 ©2003 Micron Technology, Inc. All rights reserved.
512MB, 1GB (x72, ECC, SR) 184-Pin DDR SDRAM RDIMM
Electrical Specifications
Table 10: IDD Specifications and Conditions – 512MB (All Other Die Revisions)
Values are shown for the MT46V64M4 DDR SDRAM only and are computed from values specified in the
256Mb (64 Meg x 4) component data sheet
Parameter/Condition Symbol -40B -335 -265 Units
Operating one bank active-precharge current:
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles
IDD0 2,430 2,250 2,160 mA
Operating one bank active-read-precharge current: BL = 2;
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); IOUT = 0mA; Address and control inputs
changing once per clock cycle
IDD1 3,060 3,060 2,610 mA
Precharge power-down standby current: All device banks idle; Power-
down mode;
t
CK =
t
CK (MIN); CKE = LOW
IDD2P 72 72 72 mA
Idle standby current: CS# = HIGH; All device banks idle;
t
CK =
t
CK (MIN);
CKE = HIGH; Address and other control inputs
changing once per clock cycle;
V
IN
=V
REF
for DQ, DM, and DQS
IDD2F 1,080 900 810 mA
Active power-down standby current: One device bank active; Power-
down mode;
t
CK =
t
CK (MIN); CKE = LOW
IDD3P 720 540 540 mA
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active
;
t
RC =
t
RAS (MAX);
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice
per clock cycle; Address and other control inputs changing once per clock
cycle
IDD3N 1,260 1,080 900 mA
Operating burst read current: BL = 2; Continuous burst reads; One device
bank active; Address and control inputs changing once per clock cycle;
t
CK =
t
CK (MIN); IOUT =0mA
IDD4R 3,600 3,150 2,700 mA
Operating burst write current: BL = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock
cycle;
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock
cycle
IDD4W 3,510 3,150 2,700 mA
Auto refresh current
t
REFC =
t
RFC (MIN) IDD5 4,680 4,590 4,410 mA
t
REFC = 7.8125µs IDD5A 108 108 108 mA
Self refresh current: CKE ≤ 0.2V IDD6727272mA
Operating bank interleave read current: Four device bank interleaving
reads (BL = 4) with auto precharge;
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN);
Address and control inputs change only during active READ or WRITE
commands
IDD7 8,460 7,380 6,570 mA
