PDF: 09005aef8074e85b/Source: 09005aef8072fe49 Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDF18C64_128x72.fm - Rev. F 9/08 EN
4 ©2003 Micron Technology, Inc. All rights reserved.
512MB, 1GB (x72, ECC, SR) 184-Pin DDR SDRAM RDIMM
Pin Assignments and Descriptions
Table 6: Pin Descriptions
Symbol Type Description
A0–12 Input
Address inputs: Provide the row address for ACTIVE commands, and the column address
and auto precharge bit (A10) for READ/WRITE commands, to select one location out of the
memory array in the respective device bank. A10 sampled during a PRECHARGE command
determines whether the PRECHARGE applies to one device bank (A10 LOW, device bank
selected by BA0 and BA1) or all device banks (A10 HIGH). The address inputs also provide
the op-code during a MODE REGISTER SET command. BA0 and BA1 define which mode
register (mode register or extended mode register) is loaded during the LOAD MODE
REGISTER command.
BA0–BA1 Input
Bank address: BA0 and BA1 define the device bank to which an ACTIVE, READ, WRITE, or
PRECHARGE command is being applied.
CK0, CK0# Input
Clock: CK and CK# are differential clock inputs. All control, command, and address input
signals are sampled on the crossing of the positive edge of CK and the negative edge of
CK#.
CKE0 Input
Clock enable: CKE enables (registered HIGH) and CKE disables (registered LOW) the
internal clock, input buffers, and output drivers.
RAS#, CAS#,
WE#
Input
Command inputs: RAS#, CAS#, and WE# (along with S#) define the command being
entered.
RESET# Input
Reset: Asynchronously forces all registered outputs LOW when RESET# is LOW. This signal
can be used during power-up to ensure that CKE is LOW and DQ are High-Z.
S0# Input
Chip select: S# enables (registered LOW) and disables (registered HIGH) the command
decoder.
SA0–SA2 Input
Presence-detect address inputs: These pins are used to configure the SPD EEPROM
address range on the I
2
C bus.
SCL Input
Serial clock for SPD EEPROM: SCL is used to synchronize the presence-detect data
transfer to and from the module.
CB0–CB7 I/O
Check bits.
DQ0–DQ63 I/O
Data input/output: Data bus.
DQS0–DQS17 I/O
Data strobe: Output with read data. Edge-aligned with read data. Input with write data.
Center-aligned with write data. Used to capture data.
SDA I/O
Serial data: SDA is a bidirectional pin used to transfer addresses and data into and out of
the presence-detect portion of the module.
V
DD/VDDQ Supply
Power supply: +2.5V ±0.2V.
VDDSPD Supply
SPD EEPROM power supply: +2.3V to +3.6V.
V
REF Supply
SSTL_2 reference voltage (V
DD/2).
V
SS Supply
Ground.
NC –
No connect: These pins are not connected on the module.
