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IS62WV102416BLL-25TLI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
Integrated Silicon Solution, Inc. — www.issi.com7
Rev. B
04/22/2015
IS62WV102416ALL
IS62WV102416BLL
IS65WV102416BLL
AC TEST LOADS
Figure 1.
319 Ω
5 pF
Including
jig and
scope
353 Ω
OUTPUT
3.3V
Figure 2.
Z
O
= 50Ω
1.5V
50Ω
OUTPUT
30 pF
Including
jig and
scope
AC TEST CONDITIONS (HIGH SPEED)
Parameter Unit Unit
(2.4V-3.6V) (1.65V-2.2V)
InputPulseLevel 0.4VtoVdd-0.3V 0.4VtoVdd-0.2V
InputRiseandFallTimes 1.5ns 1.5ns
InputandOutputTiming Vdd/2 Vdd/2
andReferenceLevel(VRef)
OutputLoad SeeFigures1and2 SeeFigures1and2
8 Integrated Silicon Solution, Inc. — www.issi.com
Rev. B
04/22/2015
IS62WV102416ALL
IS62WV102416BLL
IS65WV102416BLL
POWER SUPPLY CHARACTERISTICS
(1)
(OverOperatingRange)
-25 -35
Symbol Parameter Test Conditions Min. Max. Min. Max. Unit
iCC VddDynamicOperating Vdd = Max., Com. — 30 — 25 mA
SupplyCurrent iOut = 0 mA,f=fmaX Ind. — 35 — 30
Vin = 0.4V orVdd –0.3V Auto. — 60 — 60
typ.
(2)
25
iCC1 Operating Vdd = Max., Com. — 20 — 20 mA
SupplyCurrent iOut = 0 mA,f=0 Ind. — 30 — 30
Vin = 0.4V orVdd –0.3V Auto. — 50 — 50
isb1 TTLStandbyCurrent Vdd = Max., Com. — 15 — 15 mA
(TTLInputs) Vin = ViH orViL Ind. — 20 — 20
CS1 ≥ ViH,f=0 Auto. — 40 — 40
isb2 CMOSStandby Vdd = Max., Com. — 0.8 — 0.8 mA
Current(CMOSInputs) CS1 ≥ Vdd – 0.2V, Ind. — 1.2 — 1.2
Vin ≥ Vdd – 0.2V, or Auto. — 2 — 2
Vin ≤ 0.2V
, f=0 typ.
(2)
0.1
Note:
1.Atf=f
maX,addressanddatainputsarecyclingatthemaximumfrequency,f=0meansnoinputlineschange.
2.TypicalvaluesaremeasuredatV
dd=3.0V,Ta=25
o
Candnot100%tested.
Integrated Silicon Solution, Inc. — www.issi.com9
Rev. B
04/22/2015
IS62WV102416ALL
IS62WV102416BLL
IS65WV102416BLL
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
(AddressControlled)(CS1=OE=ViL, Cs2=WE=ViH, UB orLB = ViL)
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(OverOperatingRange)
25 ns
35 ns
Symbol Parameter Min. Max. Min. Max. Unit
trC ReadCycleTime 25 — 35 — ns
taa AddressAccessTime — 25 — 35 ns
tOHa OutputHoldTime 3 — 3 — ns
taCs1/taCs2 CS1/CS2AccessTime — 25 — 35 ns
tdOe OEAccessTime — 12 — 15 ns
tHzOe
(2)
OEtoHigh-ZOutput — 8 — 10 ns
tLzOe
(2)
OEtoLow-ZOutput 5 — 5 — ns
tHzCs1/tHzCs2
(2)
CS1/CS2toHigh-ZOutput 0 8 0 10 ns
tLzCs1/tLzCs2
(2)
CS1/CS2toLow-ZOutput 10 — 10 — ns
tba LB, UBAccessTime — 25 — 35 ns
tHzb LB, UBtoHigh-ZOutput 0 8 0 10 ns
tLzb LB, UBtoLow-ZOutput 0 — 0 — ns
Notes:
1. Testconditionsassumesignaltransitiontimesof5nsorless,timingreferencelevelsof0.9V/1.5V,inputpulselevelsof0.4toV
dd-0.2V/0.4Vto
V
dd-0.3VandoutputloadingspeciedinFigure1.
2. TestedwiththeloadinFigure2.Transitionismeasured±500mVfromsteady-statevoltage.Not100%tested.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

IS62WV102416BLL-25TLI

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ISSI
Description:
SRAM 16M (1Mx16) 25ns Async SRAM
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