LTC3709EUH#PBF Datasheet LTC3709EG#TRPBF, LTC3709EUH#TRPBF, LTC3709EUH#PBF | P10-P12

LTC3709

3709fb

OPERATIO

(Refer to Functional Diagram)

MAIN CONTROL LOOP

The LTC3709 is a constant on-time, current mode step-

down controller with two channels operating 180 degrees

out of phase. In normal operation, each top MOSFET is

turned on for a fixed interval determined by its own one-

shot timer OST. When the top MOSFET is turned off, the

bottom MOSFET is turned on until the current comparator

CMP

trips, restarting the one-shot timer and repeating the

cycle. The trip level of the current comparator is set by the

voltage, which is the output of error amplifier EA.

Inductor current is determined by sensing the voltage

between the SENSE

–

and SENSE

pins using either the

bottom MOSFET on-resistance or a separate sense resis-

tor. At light load, the inductor current can drop to zero and

become negative. This is detected by current reversal

comparator I

REV

, which then shuts off the bottom MOSFET,

resulting in discontinuous operation. Both switches will

remain off with the output capacitor supplying the load

current until the I

voltage rises above the zero current

level (0.8V) to initiate another cycle. Discontinuous mode

operation is disabled when the FCB pin is tied to ground,

forcing continuous synchronous operation.

The main control loop is shut down by pulling the RUN/SS

pin low, turning off both top MOSFET and bottom MOSFET.

Releasing the pin allows an internal 1.2µA current source

to charge an external soft-start capacitor C

. When this

voltage reaches 1.4V, the LTC3709 turns on and begins

operating with a clamp on the noninverting input of the

error amplifier. This input is also the reference input of the

error amplifier. As the voltage on RUN/SS continues to

rise, the voltage on the reference input also rises at the

same rate, effectively controlling output voltage slew rate.

Operating Frequency

The operating frequency is determined implicitly by the

top MOSFET on time and the duty cycle required to

maintain regulation. The one-shot timer generates an on-

time that is proportional to the ideal duty cycle, thus

holding the frequency approximately constant with changes

in V

. The nominal frequency can be adjusted with an

external resistor R

Output Overvoltage Protection

An overvoltage comparator, OV, guards against transient

overshoots (>10%) as well as other more serious condi-

tions that may overvoltage the output. In this condition,

the top MOSFET is turned off and the bottom MOSFET is

turned on and held on until the condition is cleared.

Power Good (PGOOD) Pin

Overvoltage and undervoltage comparators OV and UV

pull the PGOOD output low if the output feedback voltage

exits a ±10% window around the regulation point. In

addition, the output feedback voltage must be out of this

window for a continuous duration of at least 100µs before

the PGOOD is pulled low. This is to prevent any glitch on

the feedback voltage from creating a false power bad

signal. The PGOOD will indicate a good power immediately

when the feedback voltage is in regulation.

Short-Circuit Detection and Protection

After the controller has been started and been given

adequate time to charge the output capacitor, the RUN/SS

capacitor is used in a short-circuit time-out circuit. If the

output voltage falls to less than 67% of its nominal output

voltage, the RUN/SS capacitor begins discharging on the

assumption that the output is in an overcurrent and/or

short-circuit condition. If the condition lasts for a long

enough period, as determined by the size of the RUN/SS

capacitor, the controller will be shut down until the

RUN/SS pin voltage is recycled. This built-in latch off can

be overridden by providing a >5µA pull-up at a compli-

ance of 5V to the RUN/SS pin. This current shortens the

soft-start period but also prevents net discharge of the

RUN/SS capacitor during an overcurrent and/or short-

circuit condition.

DRV

Power for the top and bottom MOSFET drivers and most

of the internal controller circuitry is derived from the

DRV

pin. The top MOSFET driver is powered from a

floating bootstrap capacitor C

. This capacitor is normally

recharged from DRV

through an external Schottky di-

ode D

when the top MOSFET is turned off.

LTC3709

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APPLICATIO S I FOR ATIO

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Differential Amplifier

This amplifier provides true differential output voltage

sensing. Sensing both V

OUT

and V

OUT

–

benefits regula-

tion in high current applications and/or applications hav-

ing electrical interconnection losses. This sensing also

isolates the physical power ground from the physical

signal ground, preventing the possibility of troublesome

“ground loops” on the PC layout and preventing voltage

errors caused by board-to-board interconnects.

Dual Phase Operation

An internal phase-lock loop (PLL1) ensures that channel

2 operates exactly at the same frequency as channel 1 and

is also phase shifted by 180°, enabling the LTC3709 to

operate optimally as a dual phase controller. The loop filter

connected to the INTLPF pin provides stability to the PLL.

For external clock synchronization, a second PLL (PLL2)

is incorporated into the LTC3709. PLL2 will adjust the on-

time of channel 1 until its frequency is the same as the

external clock. When locked, the PLL2 aligns the turn on

OPERATIO

(Refer to Functional Diagram)

of the top MOSFET of channel 1 to the rising edge of the

external clock. Compensation for PLL2 is through the

EXTLPF pin.

The loop filter components tied to the INTLPF and EXTLPF

pins are used to compensate the internal PPL and external

PLL respectively. The typical value ranges are:

INTLPF: R

IPLL

= 2kΩ to 10kΩ, C

IPLL

= 10nF to 100nF

EXTLP: R

EPLL

≤ 1kΩ, C

EPLL

= 10nF to 100nF

For noise suppression, a capacitor with a value of 1nF or

less should be placed from INTLPF to ground and EXTLPF

to ground.

Second Channel Shutdown During Light Loads

When FCB is tied to V

, discontinuous mode is selected.

In this mode, no reverse current is allowed. The second

channel is off when I

is less than 0.8V for better

efficiency. When FCB is tied to ground, forced continuous

mode is selected, both channels are on and reversed

current is allowed.

The basic LTC3709 application circuit is shown on the

first page of this data sheet. External component selec-

tion is primarily determined by the maximum load cur-

rent and begins with the selection of the power MOSFET

switches and/or sense resistor. The inductor current is

determined by the R

DS(ON)

of the synchronous MOSFET

while the user has the option to use a sense resistor for

a more accurate current limiting. The desired amount of

ripple current and operating frequency largely deter-

mines the inductor value. Finally, C

is selected for its

ability to handle the large RMS current into the converter

and C

OUT

is chosen with low enough ESR to meet the

output voltage ripple specification.

Maximum Sense Voltage and V

RNG

Inductor current is determined by measuring the voltage

across the R

DS(ON)

of the synchronous MOSFET or through

a sense resistance that appears between the SENSE

–

and

the SENSE

pins. The maximum sense voltage is set by the

voltage applied to the V

RNG

pin and is equal to approxi-

mately V

RNG

/7.5. The current mode control loop will not

allow the inductor current valleys to exceed V

RNG

/(7.5 •

SENSE

). In practice, one should allow some margin for

variations in the LTC3709 and external component values.

A good guide for selecting the sense resistance for each

channel is:

SENSE

RNG

OUT MAX

•

()

The voltage of the V

RNG

pin can be set using an external

resistive divider from V

between 0.5V and 2V resulting

in nominal sense voltages of 50mV to 200mV. Addition-

ally, the V

RNG

pin can be tied to ground or V

, in which

case the nominal sense voltage defaults to 70mV or

140mV, respectively. The maximum allowed sense volt-

age is about 1.3 times this nominal value.

LTC3709

3709fb

Figure 1. R

DS(ON)

vs Temperature

JUNCTION TEMPERATURE (°C)

–50

NORMALIZED ON-RESISTANCE

1.0

1.5

150

3709 F01

0.5

100

2.0

The ρ

term is a normalization factor (unity at 25°C)

accounting for the significant variation in on-resistance

with temperature, typically about 0.4%/°C. Junction-to-

case temperature is about 20°C in most applications. For

a maximum junction temperature of 100°C, using a value

100°C

= 1.3 is reasonable (Figure 1).

The power dissipated by the top and bottom MOSFETs

strongly depends upon their respective duty cycles and

the load current. When the LTC3709 is operating in

continuous mode, the duty cycles for the MOSFETs are:

TOP

OUT

BOT

IN OUT

–

The maximum power dissipation in the MOSFETs per

channel is:

DRV V

TOP TOP

OUT MAX

T TOP DS ON MAX

OUT

RSS

DS ON DRV

CC GS TH

GS TH

BOT BOT

OUT MAX

⎛

⎝

⎜

⎞

⎠

⎟

⎛

⎝

⎜

⎞

⎠

⎟

()

⎛

⎝

⎜

⎞

⎠

⎟

⎛

⎝

⎜

⎞

⎠

⎟

•••

(.)• • • • •

–

••

()

() ()( )

()_

()

(

BOTBOT DS ON MAX

) ( )( )

•

APPLICATIO S I FOR ATIO

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Connecting the SENSE

and SENSE

–

Pins

The LTC3709 provides the user with an optional method to

sense current through a sense resistor instead of using the

DS(ON)

of the synchronous MOSFET. When using a sense

resistor, it is placed between the source of the synchro-

nous MOSFET and ground. To measure the voltage across

this resistor, connect the SENSE

pin to the source end of

the resistor and the SENSE

–

pin to the other end of the

resistor. The SENSE

and SENSE

–

pin connections pro-

vide the Kelvin connections, ensuring accurate voltage

measurement across the resistor. Using a sense resistor

provides a well-defined current limit, but adds cost and

reduces efficiency. Alternatively, one can use the synchro-

nous MOSFET as the current sense element by simply

connecting the SENSE

pin to the switch node SW and the

SENSE

–

pin to the source of the synchronous MOSFET,

eliminating the sense resistor. This improves efficiency,

but one must carefully choose the MOSFET on-resistance

as discussed in the Power MOSFET Selection section.

Power MOSFET Selection

The LTC3709 requires four external N-channel power

MOSFETs, two for the top (main) switches and two for the

bottom (synchronous) switches. Important parameters

for the power MOSFETs are the breakdown voltage

(BR)DSS

, threshold voltage V

(GS)TH

, on-resistance R

DS(ON)

reverse transfer capacitance C

RSS

and maximum current

DS(MAX)

The gate drive voltage is set by the 5V DRV

supply.

Consequently, logic-level threshold MOSFETs must be

used in LTC3709 applications. If the driver’s voltage is

expected to drop below 5V, then sub-logic level threshold

MOSFETs should be used.

When the bottom MOSFETs are used as the current sense

elements, particular attention must be paid to their on-

resistance. MOSFET on-resistance is typically specified

with a maximum value R

DS(ON)(MAX)

at 25°C. In this case

additional margin is required to accommodate the rise in

MOSFET on-resistance with temperature:

DS ON MAX

SENSE

()( )

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